165 Fpga Design Jobs - Page 7

locationsIndia, Bangalore time typeFull time posted onPosted 30+ Days Ago job requisition idJR0272648 Job Details: About The Role : Conducts verification of IP and/or SoC microarchitecture using formal verification tools, methodologies, and technologies based on model checking and equivalence checking algorithms. Creates comprehensive formal verification test and coverage plans including definition of formal verification scope, strategy, and techniques. Creates abstraction models for convergence on the design, carves out the right boundaries for the design, and tracks, verifies, and applies abstraction techniques. Develops formal proofs to implement the verification plan, reviews the completed proofs, and develops new formal verification methodologies. Performs convergence on design by creating formal verification methodology, abstraction, and simulation techniques. Finds and implements corrective measures to resolve failing tests. Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Understands the binary decision diagram (BDD) and data flow graph (DFG) for data paths and resolves the BDD complexity on arithmetic. Applies understanding of modeling architecture to simplify and model the problem and uses tools to formally prove protocols and architectures. Qualifications: Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related STEM degree plus 10+ years of industry experience, OR Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related STEM degree plus 8+ years of industry experience The years of experience mentioned above must focus on formal verification Preferred Qualifications: Knowledge of GPU Formal verification experience in at least one of these areasArbitration logic, low power design, memory controller, transaction router/bridge. Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. *

locationsIndia, Bangalore time typeFull time posted onPosted 18 Days Ago job requisition idJR0271803 Job Details: About The Role : Develops the logic design, register transfer level (RTL) coding, and simulation for graphics IPs (including graphics, compute, display, and media) required to generate cell libraries, functional units, and the GPU IP block for integration in full chip designs. Participates in the definition of architecture and microarchitecture features of the block being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly across verification hierarchies, drives unit level verification, and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Supports SoC customers to ensure high quality integration of the GPU block. Qualifications: Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: B.Tech/M.Tech +6 Years of relevant industry experience. Having achieved multiple tape-outs reaching production with first pass silicon. Ability to drive and improve digital design methodology to achieve high quality first silicon. Hands on experience with FPGA emulation, silicon bring-up, characterization and debug. Have experience working in GPU/CPU domain. Able to work with multi-functional teams within Intel and external vendors across geographical boundaries to resolve architectural and implementation challenges with a focus on schedule. Strong verbal and written communication skills. Good understanding of verilog and system verilog, synthesizable RTL. Knowledgeable in modern design techniques and energy-efficient/low power logic design and power analysis. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. *

This role involves the development and application of engineering practice and knowledge in the following technologiesElectronic logic programs (FPGA, ASICs); Design layout and verification of integrated circuits (ICs),printed circuit boards(PCBs), and electronic systems; and developing and designing methods of using electrical power and electronic equipment; - Grade Specific Focus on Electrical, Electronics Semiconductor. Develops competency in own area of expertise. Shares expertise and provides guidance and support to others. Interprets clients needs. Completes own role independently or with minimum supervision. Identifies problems and relevant issues in straight forward situations and generates solutions. Contributes in teamwork and interacts with customers. Skills (competencies)

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job Function The candidate would be joining a team with deep expertise in designing IP and wireless sub-systems for market leading products. In this role, the candidate would be working on cutting edge next-generation Wireless PAN technologies (Bluetooth, UWB, Thread etc.) for connectivity solutions within mobile phones, wearables, IOT and Voice & Music chips. The candidate would be a part of Bluetooth IP Design team and will be involved in IP and sub-system development. The role requires working on IP & sub-system development, latest technology nodes and on all aspects of the VLSI development cyclearchitecture, micro architecture, RTL design and integration. Close interactions with system architecture, verification, SoC Design, Validation, Synthesis & PD teams are required for design convergence. Skills/Experience 3-6 years of experience in the design of complex ASICs Strong expertise in RTL; coding complex designs using Verilog/SV Exposure to low power design methodology and designs with multiple clock domains Strong debugging, analytical skills and strong communication skills, both verbal and written Hands-on experience in front-end design tools Minimum Qualifications Bachelors or Masters Degree in Engineering in Electronics, VLSI, Communications or related field 3 years of VLSI industry experience in Digital Design Preferred Qualifications Exposure to Bluetooth/BLE Technologies and scripting languages like Perl and/or Python Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. Requirements Looking for a highly talented and a technically strong leader with an eye for quality to lead a high performing and talented team of engineers in the implementation domain for Display Sub-System. Able to handle multiple project execution that are time critical and complex Able to communicate effectively with all stakeholders across the organization Able to collaborate with cross functional teams for upholding the best practices and enabling smooth execution Focus on improving execution efficiency and improve on the optimizations in area, power and performance. Able to grow the team in terms of technical depth and size as we do more and more projects Able to innovate and bring fresh ideas Bachelors or masters degree in engineering with 9-13+ Years of experience. Should have strong understanding and in-depth knowledge of Physical Synthesis and Synthesis methodologies with leading industry standard tools. Experience with writing timing constraints for synthesis, STA, timing closure and pipelining at different levels for performance optimization and timing closure. Experience in all aspects of timing closure for multi-clock domain designs. Should be familiar with MCMM synthesis and optimization. Should have good understanding of low-power design implementation using UPF. Experience with scripting language such as Perl/ Python, TCL. Experience with different power optimization flows or technique such as clock gating. Should be able to work independently with design, DFT and PD team for netlist delivery, timing constraints validation Should be able to handle ECOs and formal verification and maintain high quality matrix Responsibilities include Synthesis, LEC, Low power checks, Memory BIST insertion, Constraints validation. Development of signoff quality constraints and the development of power intent constraints. May also include running RTL Lint, CLP, MEMBIST, DFT DRC etc. TCL script development in addition to running/analyzing/debugging designs. Hands on with Synopsys DCG/Genus/Fusion Compiler. Hands on with Synopsys Prime Time including constraint development for complex blocks with multiple clock domains. Hands on with Cadence Conformal LEC and Cadence Conformal Low Power including UPF development Experience with either RTL development or Physical Design is also a plus 13+ Years experience Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: We are seeking a highly skilled and experienced Sub-System Hardware Architect specializing in ASIC design for AI to join our dynamic team. The ideal candidate will have a strong background in hardware design and architecture, with a focus on AI sub-systems. This role involves defining and leading the hardware architecture for ASIC components within the Turing subsystem, ensuring they meet performance, reliability, power, and scalability requirements. Desired Skillset: Proven experience in designing and developing ASIC sub-system hardware components for AI applications. Strong knowledge of ASIC design tools and methodologies. Excellent problem-solving and analytical skills. Ability to work effectively in a team environment. Strong communication and interpersonal skills. Expertise in writing detailed hardware specifications and good documentation practices. Knowledge of micro-architecture, RTL coding, and clock controller design. Strong understanding of low power designs and strategies. Excellent written and verbal communication skills. Minimum Qualifications: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field. 8 to 12 years of experience in ASIC design and architecture. Principal Duties and Responsibilities: Define sub-system hardware architecture, covering performance, power strategies, etc. Collaborate with cross-functional teams, including Product, Software, SOC, and Hardware Implementation teams, to define hardware requirements and specifications. Develop and implement ASIC hardware architecture strategies for AI. Conduct power assessment and set power targets as part of the architecture work. Conduct studies to improve performance and identify bottlenecks. Write detailed and precise hardware specifications and maintain thorough documentation. Conduct feasibility studies and risk assessments for ASIC designs. Perform detailed analysis and optimization of ASIC hardware performance. Provide technical guidance and mentorship to junior engineers. Stay updated with the latest advancements in ASIC technology and AI applications. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Experience 2 to 4 years of experience Hands on experience with FPGA design toolsSynplify, Vivado, XILINX ISE, Work experience in FPGA based design implementation . FPGA RTL coding (Verilog/VHDL/System Verilog), FPGA constraint setup, verification, synthesis, Place and route and timing closure. Hands-on experience in WIFI/Ethernet/PCIe/USB/Multimedia/UFS/ARM CPU/DDR4/LPDDR5 emulation . Exposure/working experience in simulation acceleration emulation platforms like Veloce/PalladiumGate level simulation/emulation bring up Familiar with hardware schematics and Lab tools to debug. Work closely with RTL Design/Validation and Software teams for bug/issue debug, support and build bring up in emulation platform. Excellent teamwork, interpersonal and communication skills. Scripting/programming skill in C/C++, Tcl, Perl/Python/csh will be added advantage Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: The candidate would be joining a team with deep expertise in designing IP for wireless sub-systems for market leading products. In this role, the candidate would be working on connectivity solutions for mobile phones, wearables, IOT and Mobile Infrastructure chips. The candidate would be a part of Bluetooth IP Design team and will be involved in IP and sub-system development. The role requires working on the latest technology nodes on all aspects of the VLSI development cyclearchitecture, micro architecture, RTL design and integration. Close interactions with system architecture, verification, SoC Design, Validation, Synthesis & PD teams are required for design convergence. Skills/Experience 2-6 years of experience in the design of complex ASICs Strong expertise in RTL coding of complex designs using Verilog/SV Exposure to low power design methodology and designs with multiple clock domains Strong debugging, analytical skills and strong communication skills, both verbal and written Hands-on experience in front-end design tools Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

FPGA/RTL DESIGN ENGINEER (4 to 12 Years) FPGA Design Company: ACL Digital (Wafer space Semiconductor) Location [Bangalore/Pune/Chennai] Experience: 4 to 12 Years Openings: 4 Positions Job Description Responsibilities Design, implement, and validate FPGA architectures and digital circuits, ensuring high performance and reliability. Utilize VHDL/Verilog to develop and simulate complex digital systems, optimizing for speed and resource utilization. Collaborate with cross-functional teams to define requirements, specify design parameters, and conduct design reviews. Conduct thorough testing and debugging of FPGA designs, employing tools such as ModelSim, Vivado, and SignalTap. Document design processes and methodologies, maintaining detailed records for compliance and future reference. Stay abreast of industry trends and emerging technologies to continuously enhance design practices and methodologies. Required and Preferred Qualifications Required: Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field. 4+ years of experience in FPGA design, with a proven track record of successful project delivery. Strong proficiency in VHDL/Verilog and experience with FPGA development tools such as Xilinx Vivado or Intel Quartus. Solid understanding of digital design principles, including timing analysis, signal integrity, and data path optimization. Preferred: Master's degree in a relevant field. Experience with high-speed design and mixed-signal circuits. Familiarity with hardware description languages for system-level design. Knowledge of embedded systems and experience with microcontroller/Microprocessor interfaces. Technical Skills and Relevant Technologies Expertise in FPGA architecture and design tools (Xilinx, Intel, Lattice). Experience with simulation and verification tools (ModelSim, Questa, etc.). Strong knowledge of digital signal processing (DSP) concepts and applications. Soft Skills and Cultural Fit Exceptional problem-solving abilities with a keen attention to detail. Strong collaboration and communication skills, with the ability to work effectively in a team environment. Proactive approach to identifying opportunities for improvement and innovation. Passionate about technology, with a continuous learning mindset.

Job Description: This is a full-time role for an FPGA Design Engineer at Agiliad Technologies in Pune. The FPGA Design Engineer will be responsible for tasks related to designing and developing products using Lattice and Altera FPGAs. Collaborating with cross-functional teams on product development. Job Title: FPGA Design Engineer Location: Pune Experience level: 4 -6 Years Responsibilities and Skills: In depth knowledge with VHDL/Verilog/System Verilog, Embedded C, RTL design, FPGA design, Knowledgeable about FPGA architecture. In-depth tool flow knowledge of FPGA design tools any of Xilinx, Altera, Lattice. Must be willing to learn new software tools. Complete FPGA development flow from logic design, place & route, timing analysis closure, simulation, verification, and validation Experience with Lattice/Altera FPGA families and corresponding development tools Experience of development & debugging firmware on FPGA based processors (Microblaze/Nios/Risc-V/Zynq-SoC). RTOS experience is added advantage. Experience in verification/simulation tools like Modelsim, code optimization to reduce resource usage, ability to understand synthesis reports, perform timing analysis and write FPGA design constraints, write testbenches for design verification Debugging and troubleshooting FPGA implementations on hardware boards Firsthand experience on communication protocols UART/SPI and bus interfaces AMBA/AXI. Knowledge of interfaces like, Flash, Ethernet, SerDES Memories like DDR. etc will be an added advantage. Understanding of Analog and digital Fundamentals, use of hardware such as oscillator and logic analyzers for hardware debugging. Qualifications: Bachelors/Master’s in Electrical Engineering, Computer Science, or related field. Proven experience in FPGA development, with a focus on low power consumption. Strong programming skills in hardware description languages (e.g., Verilog, VHDL) and experience with FPGA development tools. Strong sense of ownership, passionate, fast learner, analytical mind set, perfection seeker. Excellent problem-solving and debugging skills. Strong interpersonal, communication, collaboration and presentation skills. Experience Level: Minimum 4 years of relevant experience in FPGA development.

Skills: Programming Language : Strong in VHDL along with Working knowledge on Verilog/System-Verilog Preferable Skills: * Use of tools such as Quartus, Vivado, Libero and their IPs * Experience with using any simulator (Modelsim, XSIM, etc.) * Deep understanding of FPGA design flow including RTL design, verification, logic synthesis, timing analysis, floor-planning, ECO, bring-up & lab debug. * Experience with gate-level understanding of RTL and synthesis * Experience with basic lab equipment such as Logic analyzers, scopes, protocol analyzers, etc. * Development experience and board level debugging on Ethernet (1G, 10G) experience is preferable * Experience in DDR3/DDR4 is preferable * Experience in AMBA/AXI is preferable * Good interpersonal and communication skills Vhdl

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: We are seeking a highly skilled and experienced SoC Management IP Design lead to join our team. This position requires overseeing the development of all SoC Management IPs primarily Debug and Timer IPs, which includes creating micro-architecture specifications, IP design and verification. The ideal candidate will have a strong background in IP development and SoC Management Architecture, with a focus on both technical leadership and management responsibilities. IP Design, Verification and Delivery SoC and Platform Architecture Development Key Responsibilities Leadership and Management Lead and manage the development of SoC management IPs, Primarily Debug and Timer IPs IP Design, Verification and Delivery Provide technical leadership and guidance to the IP development team. Oversee the entire lifecycle of IP development, from concept to implementation and validation. Collaborate with cross-functional teams to ensure seamless integration of IPs into SoC designs. Technical Expertise Experience of RTL design for complex SoC development using Verilog and/or SystemVerilog Experience with Arm-based designs and/or Arm System Architectures Drive the architecture and design of SoC Management IPs. Ensure the IPs meet performance, power, and area requirements. Stay updated with the latest industry trends and technologies in SoC management and IP development. Troubleshoot and resolve complex technical issues related to IPs. Collaboration and Communication Work closely with other engineering teams, including SoC design, verification, and validation teams. Foster a collaborative and innovative work environment. Communicate effectively with team members, management, and external partners. Qualifications Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Proven experience in SoC Management IP development, including debug and timers IPs. Strong technical leadership and management skills. Excellent understanding of SoC architecture and design principles. Strong problem-solving and analytical skills. Excellent communication and interpersonal skills. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 6+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 5+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. About The Role Join Qualcomm's design verification team in verifying the high-speed mixed-signal IP designs ( PCIe, USB, MIPI, CXL, C2C, D2D, DDR, PLL, DAC, ADC, Sensors, etc.) for exciting products targeted for 5G, AI/ML, compute, IOT, and automotive applications. The team is responsible for the complete design verification lifecycle, from system-level concept to tape out and post-silicon support. Responsibilities Define pre-silicon and post-silicon testplans based on design specs and using applicable standards working closely with design team. Architect and develop the testbench using advanced verification methodology such as SystemVerilog/UVM, Analog/mixed signal simulation, Low power verification, Formal verification and Gate level simulation to ensure high design quality. Author assertions in SVA, develop testcases, coverage models, debug and ensure coverage closure. Work with digital design, analog circuit design, modeling, controller/subsystem, & SoC integration teams to complete the successful PHY level verification, integration into subsystem and SoC, and post-silicon validation. Minimum Qualifications Master's/Bachelor"™s degree in Electrical Engineering, Computer Engineering, or related field. 8+ years ASIC design verification, or related work experience. Knowledge of a HVL methodology like SystemVerilog/UVM. Experience working with various ASIC simulation/formal tools such as VCS, Xcellium/NCsim, Modelsim/Questa, VCFormal, Jaspergold, 0In and others. Preferred Qualifications Experience with Low power design verification, Formal verification and Gate level simulation. Knowledge of standard protocols such as PCIe, USB, MIPI, LPDDR, etc., Experience in scripting languages (Python, or Perl). Experience with mixed-signal IP design verification, such as USB, PCIe, CXL, C2C, D2D, MIPI, UFS, DDR, PLL, Data Convertors (DAC, ADC), or sensors.

In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running.The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise Join Optical Networks division , where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, weve united two industry leaders to create an optical networking powerhousecombining cutting-edge technology with proven leadership to redefine the future of connectivity. Infinera is now part of the Nokia Corporation and its subsidiaries. When you apply, the information you share will be handled with care and used only for recruitment purposes within the group. As a FPGA Verification Engineer at Nokia, you will work for a high complexity DWDM equipment for LH/ULH applications. You will work in close collaboration with multi location cross-functional R & D teams. Our work includes everything from product concept to finished product - a process that spans over the entire development cycle. The team takes full responsibility for delivery on time with the right quality. This role typically requires 36 years of experience developing SystemVerilog UVM-based test environments and implementing comprehensive test plans at block, sub-chip and chip levels Strong proficiency in Hardware Verification Languages (HVL), with practical coding experience for verification tasks Practical experience using industry-standard simulators such as VCS, NC-Sim, or ModelSim (MTI), along with strong skills in waveform-based debugging. Solid understanding and practical application of UVM or similar modern verification methodologies. Experience with scripting languages such as Perl is highly valued and will help you stand out. It would be nice if you also had: Working knowledge of RTL design and familiarity with technologies like Ethernet, PCIe, and preferably telecom protocols. Strong analytical, troubleshooting, and problem-solving skills, with a structured and thorough approach to work. Good written and oral communication skills are required. Excellent written and verbal communication skills. Flexible, innovative, and self-driven team player with a strong willingness to take initiative. Design and develop comprehensive FPGA verification plans. Create and implement verification environments and testbenches. Develop and execute test scenarios for running simulations. Perform coverage analysis to ensure thorough verification. Provide lab support during FPGA and board bring-up phases. Collaborate closely with design and system teams to drive verification solutions. Independently manage verification tasks and projects. What We Offer: Opportunity to work in short product development cycles, allowing you to quickly see the real impact of your contributions on products and business success. International career development opportunities with internal mobility programs that encourage professional growth and advancement within the company. Access to a variety of social, wellness, and hobby clubs to support a balanced lifestyle and foster a sense of community. A friendly, inclusive, and supportive atmosphere where collaboration and mutual respect are core values. The chance to work alongside highly skilled, motivated, and innovative colleagues who are passionate about technology and excellence.

Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Emulation Good to have skills : NA Minimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Engineer, you will analyze, design, code, and test multiple components of application code across one or more clients. You will perform maintenance, enhancements, and/or development work in a dynamic environment, contributing to the success of the projects. Roles & Responsibilities: Expected to be an SME, collaborate, and manage the team to perform. Responsible for team decisions. Engage with multiple teams and contribute on key decisions. Provide solutions to problems for their immediate team and across multiple teams. Lead and mentor junior team members. Conduct code reviews to ensure code quality and adherence to coding standards. Professional & Technical Skills: Must To Have Skills: Proficiency in Emulation platform like Palladium/Zebu/Veloce/HAPS. Strong understanding of SOC Architecture Experience with debugging using any Emulation Palladium/Zebu/Veloce/HAPS platform. Hands-on experience with ARM (A/M) architecture. Knowledge of C language. Additional Information: The candidate should have a minimum of 5 years of experience in Emulation. This position is based at our Bengaluru office. A 15 years full-time education is required. Qualification 15 years full time education