1183 Floor Planning Jobs - Page 3

We are looking for a highly experienced and skilled Director ASIC Physical Design to lead our team in Synopsys (India) Private Limited. The ideal candidate will have a strong background in physical design and a proven track record of delivering successful projects. Roles and Responsibility Lead the development of physical designs for complex ASICs, ensuring high performance and low power consumption. Collaborate with cross-functional teams to define and implement design requirements. Develop and maintain relationships with key stakeholders, including customers and internal teams. Provide technical guidance and mentorship to junior team members. Participate in design reviews and provide feedb...

We are hiring PD Implementation Engineers with 410 years of experience for our semiconductor client in Noida. Key Responsibilities: Block-level implementation using Synopsys Fusion Compiler PPA optimization understanding Synthesis, Floorplanning, CTS, and Routing Interaction with STA/PV/PDN teams for timing ECOs, PDN resolutions, and DRC/LVS closure Knowledge of LEC/CLP is an added advantage Strong scripting in TCL, Unix Experience: 4–10 Years Location: Noida Domain: PD Implementation

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer ...

He/She should be able to do block level / top-level floor planning, PG Planning, partitioning(for hierarchical designs),placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks and be able to fix the violations. Should have worked on 45nm, 28nm or lower node designs with adv low power techniques such as Voltage Islands, Power Gating and substrate-bias. Provide technical guidance, mentoring to physical design engineers. Interface with front-end ASIC teams to resolve issues. Excellent communication...

Job Details Job Description: Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis. Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. Analyzes results and makes recommendations to fix violations for ...

Job Overview: Physical Design Engineer implements the entire ASIC/SoC back end design flow from RTL to GDSII to create design databases ready for manufacturing with a special focus on power, performance & area optimization with next generation state of the art process technologies. Physical Design Engineer Experience: 5 Years & above (Mandatory). Education: BE/ ME/B. Tech/M. Tech/MS or equivalent disciplines with an emphasis on VLSI design Location: Bengaluru, India EMPLOYMENT TYPE: FULL TIME Roles & Responsibilities: - Take complete ownership of the implementation of Block level designs and Chip level design - Responsible for planning and execution of all aspects of Physical Design includin...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience OR Master's degree in Computer Science, Electrical/Electronics Engineeri...

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements Minimum Qualifications: Bachelor's degree in Computer Sci...

Position: Physical Design Engineer, immediate Joiners and 30Days Notice Location: Bangalore Experience: 412 Years Role Overview: Block-level Physical Design from RTL/Netlist to GDSII Physical, Timing & Power Signoff at block level ECO generation and closure Scripting & automation using Perl, Tcl, Awk, Python Lead Role: Manage a team of 4–6 engineers and act as client SPOC Requirements: Strong expertise in Physical Design flows and signoff methodologies Excellent technical and communication skills Proven experience in leading small project teams (for Lead role)

Job Title: Physical Design Engineer Location : Bengaluru, India Type : Full-Time Industry : Semiconductors / VLSI / ASIC Design Job Summary: We are seeking a skilled Physical Design Engineer to join our chip development team. In this role, you will be responsible for implementing and optimizing the physical layout of complex ASICs from RTL to GDSII. Youll collaborate closely with RTL design, verification, and DFT teams to ensure successful tape-out of high-performance, low-power silicon designs. Key Responsibilities: Own and execute physical design tasks including floorplanning, power planning, placement, clock tree synthesis (CTS), routing, and physical verification (LVS/DRC). Work on timin...

Job Description Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cas...

Job Description Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cas...

Job Description Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cas...

Design & Concept Development. Create interior-inspired designs for Lounges,mandaps, reception stages, couple seating, dining areas, guest seating layouts, and experience zones. Required Candidate profile portfolio in showcasing space design, styling, Proficiency in AutoCAD, SketchUp, 3D Max, understanding of materials, finishes, fabrication processes, and dcor styling.

SUMMARY Max CTC : 21,330 Work Timings : US Shift/ Night Shift Contract Duration : 6 months Work location : CDC 5,Shollinganallur Important Pointers Candidate should be flexible to WFO Should be comfortable in International Voice Process. English communication should be excellent. Retention Bonus will be paid as follows 3months 5,000 3+6months -10,000 3+6+6months 10,000 Requirements Any Non Technical Graduates with Good communication skill Eligible. No PG and BE / BTECH Graduate is Eligible Should be able to Speak & Write good English with proper punctuation & grammar. Benefits PF,ESI BOTH WAY CAB(Pickup and drop will be provided) Work From office

Hope you are doing well. We are currently hiring for an STA Engineer position at Eximietas Design , and based on your background, you may be an excellent fit for this role. Please find the detailed Job Description below. Job Description STA Engineer (Static Timing Analysis) Company: Eximietas Design Location: Bangalore Experience: 6+ Years About the Role: We are seeking an exceptional STA Engineer to join our semiconductor design team. You will collaborate with talented engineers to deliver high-performance, energy-efficient, and scalable ASIC designs. This role involves leading STA efforts for complex, high-speed, advanced-node ASICs in a fast-paced environment. Responsibilities: Lead a tea...

SUMMARY Part-Time Weekend Job Join Leading Food & Beverage Industry Team in Bangalore Job Role: Weekend Supporting Staff Company: Food & Beverage Industry Location: Bangalore Work Locations: Lulu Mall (Rajajinagar) Phoenix Marketcity (Whitefield) Shift Timing: 12:00 PM 5:00 PM Work Days: Saturday and Sunday Estimated Monthly Earnings: 3,000 3,500 Work 4 5 hours and earn extra income every weekend Key Responsibilities: Support kitchen and floor staff Serve starters, beverages, and non-vegetarian items (including chicken) Maintain cleanliness in service and dining areas Ensure smooth dining operations Requirements: No prior experience required (orientation provided) Must be energetic, discipli...

Required skills: Experience into STA and timing closure/signoff experience with PD domain skill-set/knowledge. Candidate should be able to understand the timing constraints, analyze design details, analyze timing reports from prepcts to postcts stages, in-depth concepts of 14nm technode STA analysis, DCD knowledge. Candidate is preferably expert in PT and Tempus tools. Education Requirements B. Tech / M. Tech (ECE) Experience 5 to 12 Years Shift General Work Week Monday to Friday Joining time Immediate to 90 Days

He/She should be able to do block level / top-level floor planning, PG Planning, partitioning(for hierarchical designs),placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks and be able to fix the violations. Should have worked on 45nm, 28nm or lower node designs with adv low power techniques such as Voltage Islands, Power Gating and substrate-bias. Provide technical guidance, mentoring to physical design engineers. Interface with front-end ASIC teams to resolve issues. Excellent communication...

We are seeking a highly experienced Senior Physical Design Engineer with 8+ years of experience in block-level and full-chip physical implementation. The candidate should be proficient in physical design flows and methodologies for advanced technology nodes. Key Responsibilities: Drive physical implementation from RTL to GDSII (floorplanning, placement, CTS, routing) Perform timing analysis, congestion analysis, and physical verification (DRC/LVS) Optimize for performance, power, and area (PPA) Collaborate closely with RTL, STA, DFT, and package teams Own signoff checks (IR drop, EM, Antenna, Crosstalk, etc.) Support tape-out and silicon validation activities Requirements: 8+ years of experi...

We are looking for a skilled SAP DRC Consultant with 19 years of experience to join our team at Forward Eye Technologies. The ideal candidate will have a strong background in SAP DRC and be able to work effectively in a fast-paced environment. Roles and Responsibility Collaborate with cross-functional teams to design and implement SAP DRC solutions. Provide technical expertise and support for SAP DRC projects. Develop and maintain documentation for SAP DRC implementations. Troubleshoot and resolve complex technical issues related to SAP DRC. Conduct training sessions for end-users on SAP DRC functionality. Work closely with stakeholders to understand business requirements and develop solutio...

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life's work , to amplify human creativity and intelligence. As an NVIDIAN, you'll be immersed in a diverse, supportive environment where everyone is inspired to do thei...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Job Description Actively contribute to provide Custom Datapath solutions for next generation Memory in advanced CMOS technology nodes. Designing Datapath (custom and/or RTL) Blocks, Full chip Timing Finesim Design closure to meet the specifications and product requirements Work closely with team and actively participate in technical discussions and reviews. Pro-actively get design issues/problems solved. Contribute to or propose innovative design solutions and design methodologies. Qualifications Bachelors/Masters degree in Electronics & Telecommunication/Electrical engineering (VLSI Design) Hands-on design knowledge on both Digital custom, Analog & mixed signal design environment. 4+ years ...

PW is looking for DTP Professional to join our dynamic team and embark on a rewarding career journey Layout and Design: Create and design visually appealing layouts for various print and digital materials, including brochures, flyers, reports, presentations, and advertisements, using desktop publishing software. Typography and Formatting: Apply proper typography techniques, including font selection, size, spacing, and alignment, to ensure clear and readable text. Format and style content consistently according to brand guidelines and industry standards. Graphics and Images: Incorporate images, illustrations, charts, and other visual elements into layouts. Ensure high-quality resolution and p...