3361 Ethernet Jobs - Page 37

A Day in Your Life at MKS: As a Software Engineer supporting the Lasers Business Unit of MKS Instruments , you will partner with Spectra-Physics Scientists and Engineers; Optical, Electrical and Software to contribute to the design and development of new free-space and fiber-based laser systems providing firmware and software to enable new laser technologies. In this role, you will report to the Manager, Software Development. You Will Make an Impact By: Develop embedded code for new & existing laser products based upon ARM microcontrollers. Develop Windows-based GUI interfaces for laser systems. Bring-up, system debugging & code optimization Work in a collaborative environment sharing ideas, practices & code. Support existing products by performing failure analyses & troubleshooting. Coordinate closely with optical engineers, physicists, marketing & customers to develop, deliver & support industry-leading laser systems. Skills You Bring: BS degree in Electrical Engineering, Software Engineering or equivalent 5+ years related experience Understanding of embedded firmware techniques & challenges. Familiarity with I/O devices such as ADC, DAC, FPGA and interfaces such as I2C, SPI, RS-232, Ethernet & USB. Ability to read electronic schematic diagrams & component datasheets. Proficiency programming in C, C++, C# Experience with test equipment (DVM, Oscilloscopes). Use of version control systems & build tools (Azure DevOps, GIT) Excellent communication, documentation & organizational skills. Quality-driven. Committed to meeting schedules, able to balance performance, cost & time constraints. Preferred Skills: Advanced degree. Formal Agile methodology experience. Experience with Real-Time Operating Systems (Azure/Threadx, FreeRTOS), QNX and/or LINUX. C# and MS Visual Studio. Experience working with distributed teams. Experience with Programmable logic such as FPGA. Precision equipment design & development.

Astera Labs Inc., a leader in purpose-built connectivity solutions for data-centric systems, is seeking Lead Software QA Engineer for their Bengaluru (India) Design Center. Partnering with leading processor and GPU vendors, cloud service providers, world-class manufacturing companies, Astera Labs is helping data-centric system designers remove performance bottlenecks in compute-intensive workloads such as Artificial Intelligence and Machine Learning. For more information about Astera Labs, see www.AsteraLabs.com . Key Responsibilities Lead and scale high-performing Firmware QA teams in India. Own the full software development lifecycle, from architecture and design to testing and deployment. Develop and implement software development and QA best practices, including test automation, process monitoring, and quality metrics. Collaborate cross-functionally with hardware, product, and customer-facing teams to define and deliver robust software solutions. Communicate regularly with global customers including Hyperscalers and Tier 1 OEMs to provide updates, support audits, and resolve escalations. Help build large-scale test farms and automation frameworks. Mentor, coach, and grow engineering talent through effective performance management and career development. Drive continuous improvement in team efficiency, quality, and delivery. Basic Qualifications : Bachelor s degree in Electrical Engineering or Computer Science (Master s or PhD preferred). 10+ years of experience in firmware software QA. Proven ability to build and manage complete software development teams in India. Expertise in Agile software development methodologies. Deep understanding of software test methodologies, automation, and management tools. Excellent communication and interpersonal skills, especially in customer-facing roles. Strong planning, prioritization, and project management skills in fast-paced environments. Entrepreneurial, proactive mindset with a passion for innovation and customer success. Required Experience : Proficiency and demonstrated experience with ASIC based hardware systems and SQA mechanisms. Knowledge of PCIE is required. Building and scaling technical teams with a focus on collaboration and innovation. Proficient in C and Python programming. Expert-level user of Git, Jira, and Confluence. Experience defining and tracking software KPIs and quality metrics. Development and implementation of firmware design and test plans. Knowledge of hardware/software architecture and its impact on system performance. Preferred Experience : Experience with Security Development Lifecycle and FIPS certification. Familiarity with cryptographic protocols and implementation. Knowledge of memory (DDR4/DDR5/HB) technologies. Deployment of AI based SQA and FW development

Manual tester with 5+ years of relevant experience in control system product testing. Desired Skill Sets Good in Manual Testing concepts Strong experience in DCS / HMI desktop and web application testing. Strong in Field protocols OPC UA, MODBus, HART, Ethernet etc. . Concepts on integration testing Basic Knowledge in Linux OS and commands Good knowledge in Test plan creation, GIT Experience in Scrum model Good communication skills.

Manual tester with 3+ years of relevant experience in control system product testing. Work Location: BLR Desired Skill Sets Good in Manual Testing concepts Strong experience in DCS / HMI desktop and web application testing. Strong in Field protocols OPC UA, MODBus, HART, Ethernet etc. . Concepts on integration testing Basic Knowledge in Linux OS and commands Good knowledge in Test plan creation, GIT Experience in Scrum model Good communication skills.

NVIDIA is looking for best in class Software Development Engineers to join our outstanding Networking Driver engineering team, developing driver, protocols and application to deliver high throughput and lowest latency with low CPU utilization! Come and take a significant part in architecting, crafting, developing and verifying innovating solutions. Enjoy working in a relevant, growing and highly professional environment where you make a huge impact in a technology-focused company. What you will be doing: Architect and craft solution for real world networking problems. Daily work involves all aspects of development: Architecture, Design, Coding, Production and Verification Flexibility to work cross-functional teams You will implement and develop applications and solutions using innovative pioneering distributed technologies to ensure scalability, reliability, and efficiency. Take on complex system-level optimization and resource utilization challenges. What we need to see: BS/ MS. in Computer Science/ Engineering or equivalent experience 5+ years of relevant work experience Strong coding, debugging and performance tuning Experience in C Good knowledge of standard Ethernet Good knowledge of Network protocols Proficiency in English language & clear communication Ways to stand out from the crowd: Knowledge of TCP/IP protocols and networking stack Knowledge of QNX/Linux drivers Working with hardware team Experience in silicon bring-up activities

The opportunity Responsible for Configuration of IED s used in EHV Substations, Development of HMI s using vendor specific tools and testing of CRP and SAS of EHV substations (above 132kV Voltage level). Ensure that the Substation Automation Projects delivered by HEIL are configured as per the project requirements and tested, put into service on time, meeting highest HEIL quality and OHS standards. Meet or exceed the customer expectations in testing & configuration of IED in line with project requirements. How you ll make an impact As a testing and configuration engineer, carrying out the configuration of IED s, development of HMI s in line with project requirements and testing of Control and relay panels, Substation automation system delivered and actively contribute in the testing team of Grid Automation Systems. Execute the project IED s configurations and testing safely following all safety standards of HEIL as well as customer. Reports Hazards, Near Misses at working location back to office for records and further improvement. Ensure that customer relations are managed in an optimal way. Carryout the Configurations of IED s and testing the Control, Protection and SAS panels as per the documented process description and checklists. Continuous interactions with testing Lead and expert help to carry out the testing works effectively. Report the Configuration and testing project status testing progress & testing plan to testing Lead. Ensure efficient use of the testing assets like Test kits, Tools etc. Ensures project information of any project is fully taken from testing lead and get all IED s fully configured and tested in line with customer approved drawings and ready for the project specific testing activities before offering the projects to customer during FAT. Handing over the marked-up drawings to engineering for preparing the As-build drawing and onward submission to customer to close the project. Handover the final testing backup CDs, Micro SCADA system backup, IET workplace backup and other backup as per the checklist to lead. Actively and regularly (Compulsory for every project) provides feedback to Engineering Project Management, manufacturing and quality in way that ensures re-usage of experience. Follow the key process like Test procedures, Time sheets and STAART Meetings. Ensure the installed base numerical relays are maintained with minimum revisions by continuously updating the older revisions. Ensure the usage of the latest tools and latest software versions during project IED configurations and testing. Continuous learning & acquiring expertise in various protection schemes and Automation system to achieve the higher growth in learning curve . Responsible to ensure compliance with applicable external and internal regulations, procedures, and guidelines. Living Hitachi Energy s core values of safety and integrity, which means taking responsibility for your own actions while caring for your colleagues and the business Your background Candidate Should be a graduate in Electrical and Electronics engineering with relevant of a minimum of 3 years of experience in testing and commissioning of control and relay panels in projects above 132kV Voltage levels. Should have good knowledge on Power system. Should have hands on experience with 3 Phase injection test kits like Omicron, Doble, Megger, Ponova etc Should have good knowledge on understanding the schematics of control and relay Panels, primary equipment interlocks. Should be ready for frequent travels all over India and overseas wherever assigned for at least next 5 years. Should have e good knowledge on configuration of HEIL IED s and competitors IED s in line with project requirements Should have a minimum of 3 years of experience in commissioning of SAS with IEC61850 standards, IEC101, IEC104, OPC and Modbus protocols. Should have good knowledge on communication protocols listed above. Should have good knowledge on IEC61850 standards, Ethernet, Serial communications. Should have good knowledge on communication protocols such as Modbus, DNP 3. 0, IEC 101, IEC 104, OPC, Should have competency on networking, configuration of managed Ethernet switches. Should have hands on experience on Protocol analyzers like IEC browser and network analyzer tools like wire sharks. Proficiency in both spoken & written English language is required .

Job Requirements Contribute to the elaboration of product/system specification & architecture, in collaboration with cross-functional teams Define the software requirements specifications Define the functional requirements, operational requirements, interfaces requirements and the requirements linked to performance, safety, cybersecurity, Reliability Availability and Maintainability (RAM)constraints Ensure that all the requirements can be verified (testability, ) Ensure the traceability of the software requirements through the development cycle Define the software architecture Elaborate the functional and structural breakdown into software components Allocate the requirements to the software components Define the interfaces between the software components Define the dynamical behavior of the software Validate the feasibility of the solution: model simulation, mock-up Take main technical choices for software development Select development tools, methodology (ex: UML, ), programming languages, coding strategy and coding rules, strictly following internal process/methods & tools recommendations Contribute to the selection of the execution environment (processor, operating system, middleware, basic software), together with the product architect, system engineering manager and hardware architect Designing and implementing DevOps strategies: This includes creating scalable frameworks (GitLab CI/CD components), integrating tools (compilation, SCA, SATS, etc) and processes, and aligning DevOps practices with business objectives. Building and maintaining CI/CD pipelines: Automating the build with powershell, python; automatic deployment processes to enable rapid and reliable software releases. Managing cloud-based infrastructure: Overseeing the deployment and management of cloud infrastructure using tools like Terraform and Kubernetes. Collaborating with other teams: Working with development, operations, and security teams to ensure smooth and secure software delivery. Monitoring and optimizing system performance: Ensuring the system is running efficiently, is scalable, and is secure. Guiding and mentoring junior engineers: Helping to foster a culture of continuous improvement. Implementing Infrastructure as Code (IaC): Defining and managing infrastructure using code to bring agility and consistency. Ensuring security: Implementing security measures, identity management, and compliance controls. Arbitrate and validate major software design choices Mentor developers and provide technical leadership within the team Perform software/software integration, together with the software designers Perform hardware/software integration, together with the hardware architect Specify, design, prepare and perform tests and verifications of his/her deliverables Sustain the software Organize the software Design Reviews Keep informed of the evolution of technologies through techno watch Contribute to standardization by reusing existing solutions or by defining reusable solutions, including COTS Apply and ensure application of processes and standards Contribute to continuous improvement (RoE: Return of Experience, process) Organize and lead software development activities so that to ensure QCD commitment, till the end of software development: Coordinate software development activities (software design - including activities performed by subcontractors) Participate to the product CCB (Change Control Board) for software part (i. e. manage commitment and change to software requirements) Alert the reporting structure for any event that could impact software development QCD commitments Work Experience Mandatory: Proven experience as a Software Architect with a strong portfolio of successful projects. Proficiency in Python and C programming languages. Knowledge on communication protocols [Ethernet, TCP/IP, UDP, NTP, etc. ] Knowledge of software development methodologies and lifecycle. Understanding of agile development practices. Familiarity with version control systems, such as Git. Knowledge of user interface design principles for desktop applications. Experience in performance optimization and code refactoring Desirable: Knowledge of software development methodologies and lifecycle. Experience with railway signaling software or other transportation-related systems. Vital or secure software development Knowledge of databases [MySQL, InfluxDB, MongoDB, NoSQL, Prometheus, RethinkDB or Redis], and communication protocols [Profibus or Modbus] would be a plus. Competencies & Skills Strong understanding of CI/CD: Proficiency in setting up and managing continuous integration and continuous deployment pipelines using Gitlab; should be knowing configuration of CI/CD components for various activities like code compilation, SCA, unit test, antifactory management, component test, integration test, performance tests. Cloud computing expertise: Knowledge of different cloud services and platforms (e. g. , AWS, Azure, Google Cloud). Containerization and orchestration: Experience with containerization technologies (e. g. , Docker) and orchestration platforms (e. g. , Kubernetes). Automation and orchestration tools: Familiarity with tools like Terraform, Ansible, Puppet, and Chef. Monitoring and logging: Experience with tools for monitoring and logging system performance and activity. Security knowledge: Understanding of security best practices and vulnerabilities. Problem-solving and communication skills: Ability to identify and resolve technical issues and effectively communicate with different teams Agile, Inclusive, Responsible International mindset Strong problem-solving skills and ability to think critically and independently. Excellent English communication skills, both written and verbal. Ability to work effectively in a collaborative team environment and lead projects autonomously. Detail-oriented with a commitment to delivering high-quality software solutions. Ability to work with remote collaborators

Develop, and optimize middleware interfaces for AAOS, ensuring seamless interaction between the Android framework and automotive hardware. Implement and extend Vehicle HAL (Hardware Abstraction Layer) to support vehicle-specific features such as sensors, climate control, and audio systems. Work on vehicle-to-app interfaces, ensuring seamless communication with in-car systems through Vehicle Property APIs. Perform integration, testing, and debugging of middleware components in an AAOS environment. Customize and extend the AAOS platform to meet specific OEM requirements. Collaborate with hardware, firmware, and framework engineers to ensure smooth middleware integration. Stay updated on the latest developments in AAOS, Android APIs, and automotive technology trends. Work Experience Skills Requirement Level 1 Strong understanding of Android Automotive OS (AAOS) architecture, AOSP, including the Binder IPC mechanism Must Have 2 Experience in Android middleware development and HAL implementation Must Have 3 Proficiency in C/C++ for middleware and HAL development Must Have 4 Hands-on experiences with Vehicle HAL and VehicleProperty APIs for accessing vehicle data (eg, fuel level, tire pressure, speed) and controlling hardware Must Have 5 Strong knowledge of communication protocols (eg, Bluetooth related, TCP/IP, Wi-Fi, CAN, Ethernet) Must Have 6 Expertise in developing and optimizing middleware interfaces for telephony, media, navigation, and connectivity Must Have 7 Expertise in Audio Policy Configuration, Android Audio HAL (Hardware Abstraction Layer) customization Must Have 8 Strong experience in profiling and optimizing middleware performance using tools like Systrace, Perf, and Traceview Must Have 9 Understanding of multi-threading and concurrency models in Android Must Have 10 Knowledge of Bluetooth, Wi-Fi, and cellular telephony middleware for automotive environments Must Have 11 Proficiency in CAN protocols, CAN database (DBC , CAN Tools (like CANalyzer, CANoe), Debugging & Troubleshooting Must Have 12 Familiarity with Android Automotive OS boot process Good To Have 13 Familiarity with secure communication protocols, encryption, and Android security model (eg, SELinux, secure boot) Good To Have 14 Experience with Car APIs like CarAudioManager, CarSensorManager, and CarNavigationManager Good To Have 15 Understanding of automotive safety standards like ISO 26262 Good To Have 16 Familiarity with automotive development processes and tools (eg, AUTOSAR, DOORS, Vector tools) Good To Have 17 Understanding of automotive hardware platforms and SoCs (eg, Qualcomm Snapdragon Automotive) Good To Have 18 Familiarity with diagnostic protocols and tools for automotive systems

Knowledge of Code coverage using features in existing simulators or stand-alone tools like Surecov, HDL score etc. Proficiency in one scripting language like Perl, C++, Python, Unix Make, Unix Shell Scripts etc. Desired Skills & Experience: Experience level 5 to 10 years. Strong domain knowledge on one or more - PCIe, USB, Ethernet, ARM, AHB/AXI, AMBA, Networking, CPU, ARM, Graphics (DDR, PCIE, USB) Should have worked on SOC Level / IP Level design using VHDL, Verilog coding RTL Coding, CDC, Lint, Spyglass. Good in logic design. Expertise in Verilog and / or VHDL is desired. Strong in SV & OOPS IP or SoC verification Functional + code coverage ARM based SoC verification Capable of developing C tests Working knowledge SV/METH Code coverage Education: B. Tech/B. E. , in Electronics/Telecommunication, Electrical) OR (PG - M. Tech/M. E, in (Electrical, Electronics/Telecommunication)

Job Requirements We are seeking highly skilled and experienced Electrical and Electronic (E&E) engineer to lead the design and integration of advanced vehicle network systems with a focus on gateway architecture, various CAN (Controller Area Network) protocols, and Body Control areas. The ideal candidate will drive end-to-end software architecture decisions for next-generation Software-Defined Vehicles (SDVs), ensuring scalable, secure, and future-proof solutions Key Responsibilities Lead the architecture and design of SDV platforms, focusing on vehicle gateway and CAN network topologies (e. g. , CAN-FD, CAN-HS, CAN-LIN) Define and review system and software architecture for all related ECUs Collaborate with cross-functional teams including hardware, software, cybersecurity, diagnostic and cloud services to deliver integrated vehicle solutions Evaluate and define software interfaces, data exchange formats, and communication strategies between ECUs and central computer platforms Ensure compliance with automotive standards Participate in platform development planning, toolchain selection, and development processes in a CI/CD environment Perform architectural reviews and provide technical leadership to internal and supplier development teams. Work closely with validation and verification teams to ensure robust testing and diagnostics of gateway and related ECU functions Work Experience Primary Skills/Requirements Bachelor or master degree in electrical engineering, Computer Science, or related field. 8+ years of experience in automotive embedded systems, with at least 3 years in an architecture role. Deep Understanding of vehicle network architecture and multi-ECU interactions Expertise in protocols such CAN, UDS, DoIP, Flexray, MOST, ethernet etc. Experience in system engineering- workflows Knowledge of FOTA/OTA/SOTA framework Familiarity with cloud-based artifacts arrangement /deployment Excellent Documentation (excel/word/ppt) Good software architecture skill (UML) Communication and stakeholder management Preferred (Secondary) Skills Familiarity with Software component / ECU integration steps Knowledge of Ethernet-based communication (e. g. , SOME/IP, DoIP) Experience with cloud-connected vehicle platforms AUTOSAR (Classic or Adaptive) architecture design and implementation experience Other mandatory requirements\u3000 Japanese - N3 and above

Job Requirements We are seeking a highly skilled and experienced Electrical and Electronic (E&E) to lead the design and integration of advanced FOTA features with focus on domain controller architecture for BODY and GATEWAY. The ideal candidate will drive end-to-end software architecture decisions for next-generation Domain Controller in Software-Defined Vehicles (SDVs), ensuring scalable, secure, and future-proof solutions Key Responsibilities Lead the architecture and design of Domain Controller ECU with focus on BODY and GATEWAY in SDV platforms Define and review system and software architecture for Domain Controller Collaborate with cross-functional teams including hardware, software, cybersecurity, diagnostic and cloud services to deliver integrated vehicle solutions Evaluate and define software interfaces, data exchange formats, and communication strategies between ECUs and central computer platforms Ensure compliance with automotive standards Participate in platform development planning, toolchain selection, and development processes in a CI/CD environment Perform architectural reviews and provide technical leadership to internal and supplier development teams. Work closely with validation and verification teams to ensure robust testing and diagnostics of gateway and related ECU functions Work Experience Primary Skills/Requirements Bachelor or master degree in electrical engineering, Computer Science, or related field. 8+ years of experience in automotive embedded systems, with at least 3 years in an architecture role. Deep Understanding of vehicle network architecture and multi-ECU interactions Expertise in protocols such CAN, UDS, DoIP, Flexray, MOST, ethernet etc Experience in system engineering- workflows Knowledge of FOTA/OTA/SOTA framework Familiarity with cloud-based artifacts arrangement /deployment Excellent Documentation (excel/word/ppt) Good software architecture skill (UML) Communication and stakeholder management Preferred (Secondary) Skills Familiarity with Software component / ECU integration steps Knowledge of Ethernet-based communication (e. g. , SOME/IP, DoIP) Experience with cloud-connected vehicle platforms AUTOSAR (Classic or Adaptive) architecture design and implementation experience Other mandatory requirements\u3000 Japanese - N3 and above

Job Requirements We are looking for a skilled Android Middleware Engineer with expertise in Android Automotive OS (AAOS) to design, develop, and optimize middleware components for next-generation automotive infotainment systems. The ideal candidate will work on bridging the Android framework with vehicle hardware, creating robust and scalable solutions for automotive-specific use cases such as multimedia, connectivity, navigation, and vehicle control systems. Key Responsibilities Design, develop, and optimize middleware interfaces for AAOS, ensuring seamless interaction between the Android framework and automotive hardware. Implement and extend Vehicle HAL (Hardware Abstraction Layer) to support vehicle-specific features such as sensors, climate control, and audio systems. Work on vehicle-to-app interfaces, ensuring seamless communication with in-car systems through Vehicle Property APIs. Perform integration, testing, and debugging of middleware components in an AAOS environment. Customize and extend the AAOS platform to meet specific OEM requirements. Collaborate with hardware, firmware, and framework engineers to ensure smooth middleware integration. Stay updated on the latest developments in AAOS, Android APIs, and automotive technology trends. Work Experience Skills Requirement Level 1 Strong understanding of Android Automotive OS (AAOS) architecture, AOSP, including the Binder IPC mechanism. Must Have 2 Experience in Android middleware development and HAL implementation. Must Have 3 Proficiency in C/C++ for middleware and HAL development. Must Have 4 Hands-on experiences with Vehicle HAL and VehicleProperty APIs for accessing vehicle data (e. g. , fuel level, tire pressure, speed) and controlling hardware. Must Have 5 Strong knowledge of communication protocols (e. g. , Bluetooth related, TCP/IP, Wi-Fi, CAN, Ethernet). Must Have 6 Expertise in developing and optimizing middleware interfaces for telephony, media, navigation, and connectivity. Must Have 7 Expertise in Audio Policy Configuration, Android Audio HAL (Hardware Abstraction Layer) customization. Must Have 8 Strong experience in profiling and optimizing middleware performance using tools like Systrace, Perf, and Traceview. Must Have 9 Understanding of multi-threading and concurrency models in Android. Must Have 10 Knowledge of Bluetooth, Wi-Fi, and cellular telephony middleware for automotive environments. Must Have 11 Proficiency in CAN protocols, CAN database (DBC , CAN Tools (like CANalyzer, CANoe), Debugging & Troubleshooting. Must Have 12 Familiarity with Android Automotive OS boot process. Good To Have 13 Familiarity with secure communication protocols, encryption, and Android security model (e. g. , SELinux, secure boot). Good To Have 14 Experience with Car APIs like CarAudioManager, CarSensorManager, and CarNavigationManager. Good To Have 15 Understanding of automotive safety standards like ISO 26262 Good To Have 16 Familiarity with automotive development processes and tools (e. g. , AUTOSAR, DOORS, Vector tools). Good To Have 17 Understanding of automotive hardware platforms and SoCs (e. g. , Qualcomm Snapdragon Automotive). Good To Have 18 Familiarity with diagnostic protocols and tools for automotive systems. Good To Have

Provide support for day-to-day operational tasks associated with the management of an enterprise network environment globally, including securing, and operating all facets of LAN, WAN, and WLAN services. Manage projects to include solution design, development of plans, project schedules, and communication of status updates on project milestones. Installing, configuring, and supporting network equipment including routers, switches, firewalls, and access points. Investigate solutions to provide continual system improvements and optimization. Troubleshoot, diagnose, analyze, and resolve hardware, software, and other network and performance issues. Provide support to remote sites in APAC region (Mostly India, but also for Japan, China, Taiwan, Malaysia, when possible) working with site personnel to identify and resolve network-related issues. Provide on-site support for site changes when additional resources are required. Provide tier-2 escalation support to tickets/issues. Occasional project-based travel and flexibility to work outside of local business hours. Requirements: Bachelors degree in computer engineering, Computer Science, IT Security, or equivalent experience required. 5+ years experience supporting a multi-site IP-based network environment participating in design, implementation, maintaining and troubleshooting aspects of the network. Business-level English. Experience in working in multi-national companies, and English-speaking environment. Must be a team player with a desire to learn. Able to work effectively with peers in a team environment, while also working in a self-directed manner on multiple tasks and projects. Must be organized, process-minded, and deadline and detail-oriented. Demonstrate sound troubleshooting methodologies and strong analytical and problem-solving skills. Must possess good written and verbal communication skills needed to present to all levels of the organization. Ability to work with all levels of staff within and outside of IT and outside the organization. Ability to think through problems and visualize solutions. Qualifications Preferred Qualifications: Hands-on experience with design, implementation, configuration, and maintenance of AWS, Azure, and Oracle Cloud. Knowledge of security frameworks. Experience in configuration and maintenance of NGFW, sandboxing, and UTM Fortigate . Understanding WAN architectures, including Ethernet, site-to-site VPN, and packet switching technologies such as MPLS. Use troubleshooting skills to isolate WAN-related problems and work with service providers on resolution. Experience with Cisco/Meraki wireless LAN hardware, configuration, security, and support aspects within an enterprise environment. SD-WAN and SDN experience. DNS, IP Domain architecture, and certificate management experience. Use and management of network management systems with experience in SNMPv3, APIs, NETCONF, YANG. Scripting language experience (i. e. , python, expect, etc. , for network automation and API integration). Ansible experience is a plus. Hardware/Software load balancing experience. Facilities planning and installation to include network cabling, power, and cooling. Industry certifications (CCNA, CCNP, CCDP, CCIE, Security+, ITILv4).

Drive Architecture that will define the SOC/MCU architecture and detailed technical specifications from product requirements provided by business and product marketing organizations. Collaborate closely with product and software architects to define and refine SoC-level architecture Play a key role in shaping the microarchitecture of complex IP blocks and SoC subsystems Work closely with functional verification teams on test-plan development and reviews Collaborate with other functional teams including Design, Validation, DFT, physical design and emulation teams to achieve architectural goals and performance targets Provide support to functional validation teams in post silicon debug IP selection and make/buy decisions are a key factor for this role Qualifications Strong communication skills (written and verbal), problem solving, teamwork, attention to detail, commitment to task, and quality focus BTech/MTech in Electrical / Electronic / Computer / Hardware Engineering with experience of 12+ years Can do attitude, openness to new environment, people and culture Experience in Microcontroller and Microprocessor architecture, Interconnect, Cache Coherency Experience with benchmarking IP/SoC performance and tuning IP/SoC architecture Experience in protocols like AHB/AXI/CHI, Memory (ROM, RAM, Flash, LPDDR/DDR3/4) and memory controllers. Strong domain knowledge of clocking, system modes, power management, debug, security and other architectures is a must Any of following experience would be a plus: High Speed Peripherals like DDR, PCIe, Ethernet, GPU, VPU (Video Processing Unit); NIC/FlexNOC interconnect; Flash memory subsystems. Experience in using Virtual Prototype tools (ARM Fast Models, Synopsys Virtualizer, Windriver SIMICS etc. . ) is a plus

A highly-skilled ASIC Digital Verification Engineer with a passion for developing functional verification solutions for RTL based IP Cores. You are experienced in handling complex protocols and thrive in a collaborative international environment. With over 15 years of experience, you possess a deep understanding of verification methodologies and are proficient in SystemVerilog (SV) and Universal Verification Methodology (UVM). You are adept at making architectural decisions, implementing test benches, and driving innovation in verification solutions. You are a proactive team player with excellent communication and problem-solvin g skills, ready to contribute to cutting-edge projects in AI/machine learning, automotive, and server farm applications. What You ll Be Doing: Making architecture decisions on test bench design. Writing verification plans and s pecifications. Implementing test bench infrastructure and writing test cases. Utilizing a coverage-drive n methodology. Providing technical leadership and guidance to the team. Collaborating with architects, designers, and other verification team members across multiple sites worldwide. The Impact You Will Have: Ensuring the reliability and performance of IP Cores used in critical applications. Driving innovation in verification methodologies and solutions. Contributing to the development of industry-leadi ng technologies in AI, automotive, and server farms. Enhancing productivity and throughput through effective verification strategies. Maintaining high standards of quality and functionality in IP verification. Mentoring and guiding junior engineers, fostering a culture of continuous learning and improvement. What You ll Need: Extensive knowledge of protocols such as DDR, PCIe, AMBA (AXI, CHI), SD/eMMC, Ethernet, USB, MIPI. Hands-on experience in creating test environments from functional specifications using UVM/VMM/OVM. Proficiency in SystemVerilog (SV), UVM, and object-oriente d coding and verification. Ability to provide innovative verification solutions for enhanced productivity and performance. Experience with scripting languages like C/C++, TCL, Perl, Python is an added advantage. Experience of working with Functional safety, ISO26262 , FMEDA is an added advantage Who You Are: You are an independent thinker with a precise approach to work, capable of driving innovation and leading technical projects. Your communication skills are excellent, and you thrive in a team-oriented environment. You are committed to continuous learning and possess a strong problem-solvin g aptitude. Experience with functional safety standards like ISO26262 and FMEDA is a plus. The Team You ll Be A Part Of: You will be part of the Solutions Group at our Bangalore Design Center, India. This team is dedicated to developing functional verification solutions for IP used in diverse applications, including server farms, AI/machine learning, and automotive sectors. You will work closely with architects, designers, and other verification team members across multiple international sites, contributing to innovative and challenging projects. Benefits Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries

CPU Verification Manager Fortune 100 Organization Location: Bangalore As a Hardware Developer , you’ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable our customers to make better decisions quicker on the most trusted hardware platform in today’s market. Your Role And Responsibilities As a Functional verification engineer, you will be working on server processors/SOC or ASICs used in servers. Leading the development of the verification environment, testbenches and writing testcases. Develop skills in Functional verification tools and methodologies. Owning and Driving execution of subunits/unit level Verification Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Work with development team to ensure coverage criteria is met. Work with logic and development teams to identify test scenarios, create test plans and execute the scenarios. Work with Verification community to improve Verification methodology. Preferred Education Master's Degree Required Technical And Professional Expertise 12 + years of experience in Functional Verification of processors or ASICs. Minimum 9+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor cache coherency, Memory subsystem verification. IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification. Gate level simulation and emulation. Track record in leading teams Clock domain crossing and reset domain crossing verification Knowledge of functional verification methodology - UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Developed test-plans and test strategies for IP/unit/block level verification. Good object-oriented programming skills in C/C++, scripting languages like Python/Perl. Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in driving verification coverage closure. Preferred Technical And Professional Experience Stress testing and ability to identify corner case scenarios. Knowledge of high-speed SERDES and PHY Verification Good understanding of computer system architecture and microarchitecture. Knowledge in IP Integration and SoC level verification. Good understanding of the Server System Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community"

Job Description: System Architect About the client: Our Client is a global technology company, home to more than 220,000 people across 60 countries, delivering industry-leading capabilities centered around digital, engineering, cloud and AI, powered by a broad portfolio of technology services and products. We work with clients across all major verticals, providing industry solutions for Financial Services, Manufacturing, Life Sciences and Healthcare, Technology and Services, Telecom and Media, Retail and CPG, and Public Services. Location: Noida, Bangalore, Pune, Hyderabad, Chennai Experience: 10 to 15 years Mode of working: Hybrid (3 Days from Office) Education: University degree in Computer Science, Electronics, Telecommunications, or equivalent Essential Skills and Knowledge: Programming proficiency in C/C++/Golang, passionate about programming technologies Linux OS proficiency and shell scripting In-depth knowledge of Ethernet/IP/networks and protocols Software development experience in Systems programming Active participation in Cross-Functional Team (XFT) activities during development projects Windows programming and knowledge of Windows API is a plus Key Responsibilities: Technically coordinate the team Code creation and maintenance, strong mindset on quality and design reusability/extensibility Troubleshooting and resolving product issues Collaborate with product architects and technical leaders to define product architecture and design Contribute creative ideas for new prototypes and innovative projects Analyze and implement new product features, taking ownership of personal and team deliverables Preferred Competencies: Familiarity with SW Versioning (GIT) and tools like Gerrit, Jenkins Knowledge of cloud technologies, RESTful APIs, and configuration tools (e.g., Ansible) Proven track record of successful projects with demonstrated impact due to strong technical and personal skills.

Principal IP/RTL Design Engineer for Ethernet Switch Hyderabad / Bangalore Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore Position Overview IP/RTL Design Engineer for Ethernet Switch Position Overview We are seeking an experienced IP/RTL Design Engineer with over 10 years of experience to join our team in designing and developing intellectual property (IP) and RTL for Ethernet switches tailored for AI datacenter backend networks. The ideal candidate will have a strong background in digital design, ASIC/FPGA development, Ethernet protocols, and experience with high-performance interconnect protocols such as InfiniBand, NVLink, Infinity Fabric, with a focus on delivering high-performance, low-latency solutions for large-scale AI workloads. Key Responsibilities Design and optimize IP blocks (MAC, PCS, packet processors) for Ethernet switches. Develop synthesizable RTL (Verilog/SystemVerilog) meeting performance and timing goals. Optimize designs for low latency, high throughput, and power efficiency. Implement Ethernet protocols (IEEE 802.3, 100G/400G/800G), ECMP, and congestion control. Apply knowledge of InfiniBand, NVLink, or similar protocols for feature implementation. Use P4 or related languages for programmable packet processing. Collaborate with teams for synthesis, timing closure, and IP integration. Document designs and stay updated on AI networking trends. Required Qualifications Education: BS/MS/PhD in Electrical or Computer Engineering. Technical Skills: Proficient in Verilog/SystemVerilog for design. Knowledge of Ethernet (IEEE 802.3, 100G/400G/800G), ECMP, and congestion control. Experience with InfiniBand, NVLink, or similar protocols. Proficiency in P4 or programmable data plane languages. Knowledge of UALink, Ultra Ethernet, or RDMA/RoCE. Familiarity with power optimization or SDN. Familiarity with synthesis (e.g., Synopsys Design Compiler) and timing tools. Soft Skills: Strong problem-solving, communication, and teamwork skills. What is in it for you? Pure play product work environment Chance to work with a tightly knit group of exceptional engineers who come from the top companies of the Semiconductor world Our pay comprehensively beats "ALL" Semiconductor product players in the Indian market. A meritocracy first work place where each peer is a star A chance to be a part of industry shaping product in entirety (not bits and pieces) from initial stages A chance to work at a startup which already has customers and investor lined up for their product pipeline (We do not have a marketing/sales team, because we do not need them). A chance to learn from industry veterans who have already launched multiple Billion Dollar Semiconductor firms over the last 3 decades. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community"

We are now looking for a Senior Power Verification Engineer. NVIDIA is seeking elite ASIC Verification Engineers to verify the design and implementation of low power features for the world’s leading Smart-NICs and DPUs which help accelerate network performance while reducing the CPU overhead of Internet Protocol (IP) packet transport, freeing more processor cycles to run applications. These networking processors also embed innovative hardware engines that offload and accelerate security with in-line encryption/decryption. With unmatched RDMA over Converged Ethernet (RoCE) performance, NVIDIA Smart-NICs and DPUs deliver efficient, high-performance remote direct-memory access (RDMA) services to bandwidth- and latency-sensitive applications!The Networking Chip Design in India is a new team which is growing at a fast pace! What You’ll Be Doing Work on structural and functional verification of low power aspects of NVIDIA’s family of smartNICs and DPUs. Come up with test plans and coverage plans of these features. Write test cases, test bench components like assertions and coverage points, and own verification convergence. Collaborate with system level and unit level teams to cover the features well from functional, electrical, performance, and noise aspects. Be responsible for debugging waves to analyse power consumed by unit IP’s. Work with architects, designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams to accomplish your tasks. Validate/Correlate the effectiveness of the low power features on silicon. What We Need To See BS/MS or equivalent experience with specialisation related to Low Power techniques and Verification. 5+ years of experience. Fundamental understanding of power basics including transistor-level leakage/dynamic characteristics of VLSI circuits. Knowledge of power intent formats - UPF/CPF. Experience in Static Power check - tools like VCLP/MVRC or similar. Hands-on knowledge in Power aware dynamic verification - NLP/MVSIM or similar tools. Experience in design and verification tools (VCS, XCelium or equivalent simulation tools, Verdi, Indago or other debug tools). Familiarity with low power design techniques such as multi VT, Clock gating, Power gating, and Dynamic Voltage-Frequency Scaling (DVFS). Exposure to Cluster/Sub-system/Fullchip/SOClevel verification environments Ways To Stand Out From The Crowd Prior experience of SmartNICs (or DPU) and/or high-speed interconnects. Good software programming skills. Python/Perl/C++ preferred. Confident debugging and problem-solving skills. Good interpersonal skills and ability & desire to work as an excellent teammate. Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/ NVIDIA is committed to encouraging a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation. JR1997923

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact At Marvell, we lead the charge in cutting-edge technologies, including high-speed Ethernet Layer-1 connectivity for Data Centers. Our Layer-1 Platform team, spanning multiple geographies, is dedicated to making a long-term strategic impact on Marvell’s Cloud Data Center offerings for AI enabled networks. This dynamic group is responsible for the software, firmware, and SDKs deployed in high-speed Data Center products that enable AI and support a vast range of market-deployed devices. As an engineer in this team, you will engage in all aspects of the Software Development Lifecycle, including Test Automation design, Test Automation development, Validation and Manual Test Execution Development. What You Can Expect Test Automation, cases Design, Automation development, new software/firmware features Test cases, Manual Test execution related to Bring-up, Layer-1 hardware (MAC, PCS, SerDes, PHY). Participate in design and architecture reviews for upcoming features and components. Perform in-depth Validation, Automation, debugging of embedded software/firmware issues in complex next generation multi-processor systems. Collaborate with various teams across the company, including hardware SoC teams, hardware/software Development, internal customers, and field application engineers (FAE). What We're Looking For Bachelor’s/ Master’s degree in Electrical , Electronics or Computer Engineering, or a related field with 4 to 16 years of relevant experience. Experience with networking protocols Experience with L1-L3 protocols and feature testing – Port, PoE, Vlan, routing, etc. Experience SDK/NOS testing Knowledge with configuration networking devices using API, SNMP, RestAPI – optional Experience with test equipment for testing as Xena, Spirent, Ixia or other software TG . Experience with detecting failures and debugging. Experience with testing workflows and methodologies. Automation development C, Python Experience with CI/CD Pipelines Communication English as a native language – read/write and daily communication. Technical Documentation - ability to read/create detailed technical documentation and test plans. Team Collaboration - experience working in agile teams and using collaboration tools like JIRA, Confluence, or similar. Soft Skills Problem-Solving Skills - Strong analytical and problem-solving abilities. Attention to Detail - High level of accuracy and attention to detail in testing and reporting. Additional Compensation And Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

The opportunity Responsible for Configuration of IED’s used in EHV Substations, Development of HMI’s using vendor specific tools and testing of CRP and SAS of EHV substations (above 132kV Voltage level). Ensure that the Substation Automation Projects delivered by HEIL are configured as per the project requirements and tested, put into service on time, meeting highest HEIL quality and OHS standards. Meet or exceed the customer expectations in testing & configuration of IED in line with project requirements. How You’ll Make An Impact As a testing and configuration engineer, carrying out the configuration of IED’s, development of HMI’s in line with project requirements and testing of Control and relay panels, Substation automation system delivered and actively contribute in the testing team of Grid Automation Systems. Execute the project IED’s configurations and testing safely following all safety standards of HEIL as well as customer. Reports Hazards, Near Misses at working location back to office for records and further improvement. Ensure that customer relations are managed in an optimal way. Carryout the Configurations of IED’s and testing the Control, Protection and SAS panels as per the documented process description and checklists. Continuous interactions with testing Lead and expert help to carry out the testing works effectively. Report the Configuration and testing project status testing progress & testing plan to testing Lead. Ensure efficient use of the testing assets like Test kits, Tools etc. Ensures project information of any project is fully taken from testing lead and get all IED’s fully configured and tested in line with customer approved drawings and ready for the project specific testing activities before offering the projects to customer during FAT. Handing over the marked-up drawings to engineering for preparing the As-build drawing and onward submission to customer to close the project. Handover the final testing backup CD's, Micro SCADA system backup, IET workplace backup and other backup as per the checklist to lead. Actively and regularly (Compulsory for every project) provides feedback to Engineering Project Management, manufacturing and quality in way that ensures re-usage of experience. Follow the key process like Test procedures ,Time sheets and STAART Metings. Ensure the installed base numerical relays are maintained with minimum revisions by continuosly updating the older revisions. Ensure the usage of the latest tools and latest software versions during project IED configurations and testing. Continous learning & acquiring expertise in various protection schemes and Automation system to achieve the higher growth in ‘learning curve’. Responsible to ensure compliance with applicable external and internal regulations, procedures, and guidelines. Living Hitachi Energy’s core values of safety and integrity, which means taking responsibility for your own actions while caring for your colleagues and the business. Your background Should be a graduate in Electrical and Electronics engineering and Should have a minimum of 3 years of experience in testing and commissioning of control and relay panels in projects above 132kV Voltage levels. Should have good knowledge on Power system. Should have hands on experience with 3 Phase injection test kits like Omicron, Doble, Megger, Ponova etc… Should have good knowledge on understanding the schematics of control and relay Panels, primary equipment interlocks. Should be ready for frequent travels all over India and overseas wherever assigned for at least next 5 years. Should have e good knowledge on configuration of HEIL IED’s and competitors IED’s in line with project requirements Should have a minimum of 3 years of experience in commissioning of SAS with IEC61850 standards, IEC101, IEC104, OPC and Modbus protocols. Should have good knowledge on communication protocols listed above. Should have good knowledge on IEC61850 standards, Ethernet, Serial communications. Should have good knowledge on communication protocols such as Modbus, DNP 3.0, IEC 101, IEC 104, OPC, Should have competency on networking, configuration of managed Ethernet switches. Should have hands on experience on Protocol analyzers like IEC browser and network analyzer tools like wire sharks Project drawings & Documents from Test Lead. Project IED configurations plan and testing of panels progress reports on daily basis. Clear with min MOM points during customer FAT. Handing over of project backups once testing is closed. Proficiency in both spoken & written English language is required. Hitachi Energy is a global technology leader that is advancing a sustainable energy future for all. We serve customers in the utility, industry and infrastructure sectors with innovative solutions and services across the value chain. Together with customers and partners, we pioneer technologies and enable the digital transformation required to accelerate the energy transition towards a carbon-neutral future. We employ around 45,000 people in 90 countries who each day work with purpose and use their different backgrounds to challenge the status quo. We welcome you to apply today and be part of a global team that appreciates a simple truth: Diversity + Collaboration = Great Innovation.

Description Invent the future with us. Recognized by Fast Company’s 2023 100 Best Workplaces for Innovators List, Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient, sustainable cloud computing. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. Join us at Ampere and work alongside a passionate and growing team — we’d love to have you apply. Come invent the future with us. About the role: As a part of the Emulation Team at Ampere, you will be part of verification of the next generation of microprocessor cores on hardware emulation platform by developing and deploying new capabilities and test content to accelerate bug finding in pre-silicon. In this role, you will be at the forefront of AI innovation, building AmpereOne Aurora, our groundbreaking AI compute solution. Aurora combines high-performance general-purpose CPUs with integrated AI capabilities, offering a compelling combination of efficiency and market reach. This revolutionary product is poised to deliver superior performance while consuming significantly less power. Design Verification is an integral part of the chip design process that ensures our customers get the absolute highest quality products that meets their functional and performance requirements. The Emulation Team at Ampere Computing comprises of stellar folks who have dedicated themselves to the art and fun of design verification. We are a tight knit, fast-paced team who work extremely closely with our design and architecture partners to ensure no bug is left behind. What you'll achieve: Your responsibilities may include, but are not limited to, the following: Be part of the emulation verification execution team and be responsible for planning, development, and execution of test content in varied domains including system stress. Work in collaboration with design and architecture teams to root-cause failures using advanced debugging techniques. Develop high quality emulation test plans comprising of BareMetal content and OS based content for flushing even the most corner-case bugs. Create emulation models from RTL to run test content, using industry standard emulation platform technology. Review architecture and microarchitecture specs and influence design/microarchitecture decisions Partner with emulation vendor to debug and quickly resolve blocking issues in the emulation technology as required Verify performance and functionality of GPU/AI hardware , drivers, features ,application and tools. About you: M.Tech in Electronics Engineering or Computer Engineering with 3+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 5+ years of semiconductor experience Knowledge about AI processor/GPU architecture , Linux systems development and memory consistency models in AArch64 and/or x86 and concurrency. Knowledge about GPU Stress and functional test development. Experience in GPU compute programming or parallel programming. Demonstrated ability to rapidly learn new technologies and apply them effectively. Experience developing bare-metal content using C/C++ and assembly language for verification. ARM assembly expertise preferred. Experience with Linux kernel development, device drivers and user space programming, FW development and debugging Experience in one of the protocols in preferred - Ethernet/USB/SATA/LPDDR/HBM. Experience debugging failures using innovative debug practices and familiarity with tools such as Verdi to debug RTL issues. Working experience with emulation technology of Zebu, Palladium or Mentor Veloce is strongly recommended. What we’ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus, equity, and comprehensive benefits. We offer an annual bonus program tied to internal company goals and annual meritocratic equity awards that enable our employees to participate in the success of the company. Benefits highlights include: Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process. Ampere is an inclusive and equal opportunity employer and welcomes applicants from all backgrounds. All qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, religion, age, veteran and/or military status, sex, sexual orientation, gender, gender identity, gender expression, physical or mental disability, or any other basis protected by federal, state or local law.

Location: Bengaluru, Karnataka, India Job ID: R0099086 Date Posted: 2025-07-11 Company Name: HITACHI ENERGY INDIA LIMITED Profession (Job Category): Engineering & Science Job Schedule: Full time Remote: No Job Description: The opportunity Responsible for Configuration of IED’s used in EHV Substations, Development of HMI’s using vendor specific tools and testing of CRP and SAS of EHV substations (above 132kV Voltage level). Ensure that the Substation Automation Projects delivered by HEIL are configured as per the project requirements and tested, put into service on time, meeting highest HEIL quality and OHS standards. Meet or exceed the customer expectations in testing & configuration of IED in line with project requirements. How you’ll make an impact As a testing and configuration engineer, carrying out the configuration of IED’s, development of HMI’s in line with project requirements and testing of Control and relay panels, Substation automation system delivered and actively contribute in the testing team of Grid Automation Systems. Execute the project IED’s configurations and testing safely following all safety standards of HEIL as well as customer. Reports Hazards, Near Misses at working location back to office for records and further improvement. Ensure that customer relations are managed in an optimal way. Carryout the Configurations of IED’s and testing the Control, Protection and SAS panels as per the documented process description and checklists. Continuous interactions with testing Lead and expert help to carry out the testing works effectively. Report the Configuration and testing project status testing progress & testing plan to testing Lead. Ensure efficient use of the testing assets like Test kits, Tools etc. Ensures project information of any project is fully taken from testing lead and get all IED’s fully configured and tested in line with customer approved drawings and ready for the project specific testing activities before offering the projects to customer during FAT. Handing over the marked-up drawings to engineering for preparing the As-build drawing and onward submission to customer to close the project. Handover the final testing backup CD's, Micro SCADA system backup, IET workplace backup and other backup as per the checklist to lead. Actively and regularly (Compulsory for every project) provides feedback to Engineering Project Management, manufacturing and quality in way that ensures re-usage of experience. Follow the key process like Test procedures, Time sheets and STAART Meetings. Ensure the installed base numerical relays are maintained with minimum revisions by continuously updating the older revisions. Ensure the usage of the latest tools and latest software versions during project IED configurations and testing. Continuous learning & acquiring expertise in various protection schemes and Automation system to achieve the higher growth in ‘learning curve’. Responsible to ensure compliance with applicable external and internal regulations, procedures, and guidelines. Living Hitachi Energy’s core values of safety and integrity, which means taking responsibility for your own actions while caring for your colleagues and the business Your background Candidate Should be a graduate in Electrical and Electronics engineering with relevant of a minimum of 3 years of experience in testing and commissioning of control and relay panels in projects above 132kV Voltage levels. Should have good knowledge on Power system. Should have hands on experience with 3 Phase injection test kits like Omicron, Doble, Megger, Ponova etc… Should have good knowledge on understanding the schematics of control and relay Panels, primary equipment interlocks. Should be ready for frequent travels all over India and overseas wherever assigned for at least next 5 years. Should have e good knowledge on configuration of HEIL IED’s and competitors IED’s in line with project requirements Should have a minimum of 3 years of experience in commissioning of SAS with IEC61850 standards, IEC101, IEC104, OPC and Modbus protocols. Should have good knowledge on communication protocols listed above. Should have good knowledge on IEC61850 standards, Ethernet, Serial communications. Should have good knowledge on communication protocols such as Modbus, DNP 3.0, IEC 101, IEC 104, OPC, Should have competency on networking, configuration of managed Ethernet switches. Should have hands on experience on Protocol analyzers like IEC browser and network analyzer tools like wire sharks. Proficiency in both spoken & written English language is required Qualified individuals with a disability may request a reasonable accommodation if you are unable or limited in your ability to use or access the Hitachi Energy career site as a result of your disability. You may request reasonable accommodations by completing a general inquiry form on our website. Please include your contact information and specific details about your required accommodation to support you during the job application process. This is solely for job seekers with disabilities requiring accessibility assistance or an accommodation in the job application process. Messages left for other purposes will not receive a response.

Description The opportunity Responsible for Configuration of IED’s used in EHV Substations, Development of HMI’s using vendor specific tools and testing of CRP and SAS of EHV substations (above 132kV Voltage level). Ensure that the Substation Automation Projects delivered by HEIL are configured as per the project requirements and tested, put into service on time, meeting highest HEIL quality and OHS standards. Meet or exceed the customer expectations in testing & configuration of IED in line with project requirements. How you’ll make an impact As a testing and configuration engineer, carrying out the configuration of IED’s, development of HMI’s in line with project requirements and testing of Control and relay panels, Substation automation system delivered and actively contribute in the testing team of Grid Automation Systems. Execute the project IED’s configurations and testing safely following all safety standards of HEIL as well as customer. Reports Hazards, Near Misses at working location back to office for records and further improvement. Ensure that customer relations are managed in an optimal way. Carryout the Configurations of IED’s and testing the Control, Protection and SAS panels as per the documented process description and checklists. Continuous interactions with testing Lead and expert help to carry out the testing works effectively. Report the Configuration and testing project status testing progress & testing plan to testing Lead. Ensure efficient use of the testing assets like Test kits, Tools etc. Ensures project information of any project is fully taken from testing lead and get all IED’s fully configured and tested in line with customer approved drawings and ready for the project specific testing activities before offering the projects to customer during FAT. Handing over the marked-up drawings to engineering for preparing the As-build drawing and onward submission to customer to close the project. Handover the final testing backup CD's, Micro SCADA system backup, IET workplace backup and other backup as per the checklist to lead. Actively and regularly (Compulsory for every project) provides feedback to Engineering Project Management, manufacturing and quality in way that ensures re-usage of experience. Follow the key process like Test procedures, Time sheets and STAART Meetings. Ensure the installed base numerical relays are maintained with minimum revisions by continuously updating the older revisions. Ensure the usage of the latest tools and latest software versions during project IED configurations and testing. Continuous learning & acquiring expertise in various protection schemes and Automation system to achieve the higher growth in ‘learning curve’. Responsible to ensure compliance with applicable external and internal regulations, procedures, and guidelines. Living Hitachi Energy’s core values of safety and integrity, which means taking responsibility for your own actions while caring for your colleagues and the business Your background Candidate Should be a graduate in Electrical and Electronics engineering with relevant of a minimum of 3 years of experience in testing and commissioning of control and relay panels in projects above 132kV Voltage levels. Should have good knowledge on Power system. Should have hands on experience with 3 Phase injection test kits like Omicron, Doble, Megger, Ponova etc… Should have good knowledge on understanding the schematics of control and relay Panels, primary equipment interlocks. Should be ready for frequent travels all over India and overseas wherever assigned for at least next 5 years. Should have e good knowledge on configuration of HEIL IED’s and competitors IED’s in line with project requirements Should have a minimum of 3 years of experience in commissioning of SAS with IEC61850 standards, IEC101, IEC104, OPC and Modbus protocols. Should have good knowledge on communication protocols listed above. Should have good knowledge on IEC61850 standards, Ethernet, Serial communications. Should have good knowledge on communication protocols such as Modbus, DNP 3.0, IEC 101, IEC 104, OPC, Should have competency on networking, configuration of managed Ethernet switches. Should have hands on experience on Protocol analyzers like IEC browser and network analyzer tools like wire sharks. Proficiency in both spoken & written English language is required Qualified individuals with a disability may request a reasonable accommodation if you are unable or limited in your ability to use or access the Hitachi Energy career site as a result of your disability. You may request reasonable accommodations by completing a general inquiry form on our website. Please include your contact information and specific details about your required accommodation to support you during the job application process. This is solely for job seekers with disabilities requiring accessibility assistance or an accommodation in the job application process. Messages left for other purposes will not receive a response.

Job Overview: Harpy Aerospace is seeking a highly skilled and detail-oriented PCB Design Engineer to join our Satellite Systems team. You will be responsible for the design, layout, and documentation of high-reliability printed circuit boards (PCBs) used in spaceborne platforms, including CubeSats, microsatellites, and custom payload electronics. Key Responsibilities: Design multi-layer PCBs (up to 10+ layers) for satellite subsystems such as: Power distribution boards (EPS) Onboard computers (OBC) ADCS sensor boards Payload interface and control boards Work with aerospace-grade components (radiation-tolerant, ITAR-free, MIL-spec) Perform impedance matching, signal integrity analysis, and grounding strategies Collaborate with electrical, mechanical, and thermal teams to ensure board fit, routing, and thermal compatibility Generate schematics, BoMs, Gerber files, and manufacturing documentation Support in board bring-up, test jig development, and functional testing Ensure compliance with aerospace standards (ECSS, IPC-6012/6013, MIL-PRF-31032) Optimize designs for manufacturability (DFM), assembly (DFA), and testability (DFT) Required Skills & Qualifications: Bachelor’s or Master’s degree in Electronics Engineering, Electrical Engineering, or equivalent 3+ years of hands-on experience in PCB design for high-reliability embedded systems Proficiency in tools such as KiCad , OrCAD or Eagle Experience with high-speed routing (LVDS, Ethernet, DDR), EMI/EMC compliance Strong understanding of aerospace component selection and derating practices Familiarity with signal/power integrity simulation tools (e.g., HyperLynx, ADS) Preferred Qualifications: Experience with space-grade hardware (CubeSat or satellite bus subsystems) Knowledge of ECSS or IPC Class 3 / Class 3A requirements Experience in vibration and thermal design constraints for launch environment Exposure to RF layout techniques (UHF, S-Band) What We Offer: Opportunity to work on cutting-edge space missions Collaborative and interdisciplinary R&D environment Access to hardware-in-the-loop and cleanroom facilities Growth in India’s evolving NewSpace ecosystem Send your resume, portfolio of PCB designs (if available), and cover letter to team@harpyaerospace.in Job Type: Full-time Pay: ₹9,994.31 - ₹25,000.00 per month Benefits: Leave encashment Paid sick time Schedule: Day shift Monday to Friday Weekend availability Supplemental Pay: Performance bonus Work Location: In person Application Deadline: 14/07/2025 Expected Start Date: 14/07/2025