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ASIC Digital Design, Principal Engineer

ASIC Digital Design, Principal Engineer

Synopsys

15 - 20 years

20 - 25 Lacs

Bengaluru

Posted:1 day ago| Platform:

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Skills Required

C++ ASIC Coding USB Ethernet VMM Healthcare Perl Test cases Python

Work Mode

Work from Office

Job Type

Full Time

Job Description

A highly-skilled ASIC Digital Verification Engineer with a passion for developing functional verification solutions for RTL based IP Cores. You are experienced in handling complex protocols and thrive in a collaborative international environment. With over 15 years of experience, you possess a deep understanding of verification methodologies and are proficient in SystemVerilog (SV) and Universal Verification Methodology (UVM). You are adept at making architectural decisions, implementing test benches, and driving innovation in verification solutions. You are a proactive team player with excellent communication and problem-solvin g skills, ready to contribute to cutting-edge projects in AI/machine learning, automotive, and server farm applications.
What You ll Be Doing:
Making architecture decisions on test bench design.
Writing verification plans and s pecifications.
Implementing test bench infrastructure and writing test cases.
Utilizing a coverage-drive n methodology.
Providing technical leadership and guidance to the team.
Collaborating with architects, designers, and other verification team members across multiple sites worldwide.
The Impact You Will Have:
Ensuring the reliability and performance of IP Cores used in critical applications.
Driving innovation in verification methodologies and solutions.
Contributing to the development of industry-leadi ng technologies in AI, automotive, and server farms.
Enhancing productivity and throughput through effective verification strategies.
Maintaining high standards of quality and functionality in IP verification.
Mentoring and guiding junior engineers, fostering a culture of continuous learning and improvement.
What You ll Need:
Extensive knowledge of protocols such as DDR, PCIe, AMBA (AXI, CHI), SD/eMMC, Ethernet, USB, MIPI.
Hands-on experience in creating test environments from functional specifications using UVM/VMM/OVM.
Proficiency in SystemVerilog (SV), UVM, and object-oriente d coding and verification.
Ability to provide innovative verification solutions for enhanced productivity and performance.
Experience with scripting languages like C/C++, TCL, Perl, Python is an added advantage.
Experience of working with Functional safety, ISO26262 , FMEDA is an added advantage

Who You Are:

You are an independent thinker with a precise approach to work, capable of driving innovation and leading technical projects. Your communication skills are excellent, and you thrive in a team-oriented environment. You are committed to continuous learning and possess a strong problem-solvin g aptitude. Experience with functional safety standards like ISO26262 and FMEDA is a plus.
The Team You ll Be A Part Of:
You will be part of the Solutions Group at our Bangalore Design Center, India. This team is dedicated to developing functional verification solutions for IP used in diverse applications, including server farms, AI/machine learning, and automotive sectors. You will work closely with architects, designers, and other verification team members across multiple international sites, contributing to innovative and challenging projects.

Benefits

Health & Wellness
Comprehensive medical and healthcare plans that work for you and your family.
Time Away
In addition to company holidays, we have ETO and FTO Programs.
Family Support
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
ESPP
Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
Retirement Plans
Save for your future with our retirement plans that vary by region and country.
Compensation
Competitive salaries

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ASIC Digital Design, Principal Engineer