Posted:1 day ago|
Platform:
Work from Office
Full Time
Required Candidate profile
-5+ years of experience in chip design-Proficiency in HDLs (Verilog, SystemVerilog)-Strong scripting skills in Python and Tcl.-Hands-on experience with Synopsys, Cadence, or Siemens EDA tools.Perks and benefits
Position: Electronic Design Automation Engineer
DB Consultancy
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