Electronic Design Automation Engineer

You have expertise in one or more of the following domains: - Power Optimization: You have experience with low-power design techniques and methodologies, including the use of the Unified Power Format (UPF). - Timing Optimization: You possess proficiency in static timing analysis (STA) and experience with design constraints using the Synopsys Design Constraints (SDC) format. - Functional Safety Analysis: You have a deep understanding of functional safety concepts and standards (e.g., ISO 26262), and experience with related analysis techniques like FMEDA and FTA. - You have experience with industry-standard Electronic Design Automation (EDA) tools from vendors such as Synopsys, Cadence, or Siemens EDA. - You are proficient in hardware description languages (HDLs) such as Verilog and SystemVerilog. - You have strong scripting skills in Python and Tcl for tool automation and flow development. - You possess a solid understanding of the chip design and implementation flows, from RTL to GDSII. - You have excellent problem-solving, debugging, and analytical skills. - Strong communication and presentation skills are your strengths, with the ability to explain complex technical concepts to both technical and non-technical audiences. Required Qualifications: - Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. - 5+ years of hands-on experience in chip design, with a strong focus on RTL design, synthesis, static timing analysis (STA), or power integrity. You have expertise in one or more of the following domains: - Power Optimization: You have experience with low-power design techniques and methodologies, including the use of the Unified Power Format (UPF). - Timing Optimization: You possess proficiency in static timing analysis (STA) and experience with design constraints using the Synopsys Design Constraints (SDC) format. - Functional Safety Analysis: You have a deep understanding of functional safety concepts and standards (e.g., ISO 26262), and experience with related analysis techniques like FMEDA and FTA. - You have experience with industry-standard Electronic Design Automation (EDA) tools from vendors such as Synopsys, Cadence, or Siemens EDA. - You are proficient in hardware description languages (HDLs) such as Verilog and SystemVerilog. - You have strong scripting skills in Python and Tcl for tool automation and flow development. - You possess a solid understanding of the chip design and implementation flows, from RTL to GDSII. - You have excellent problem-solving, debugging, and analytical skills. - Strong communication and presentation skills are your strengths, with the ability to explain complex technical concepts to both technical and non-technical audiences. Required Qualifications: - Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. - 5+ years of hands-on experience in chip design, with a strong focus on RTL design, synthesis, static timing analysis (STA), or power integrity.