7 - 12 years

9 - 14 Lacs

Posted:2 hours ago| Platform: Naukri logo

Apply

Work Mode

Work from Office

Job Type

Full Time

Job Description

As a Design Engineer, you will design synthesizable IP at the point of technology, for the latest PCIe, CXL standards.
Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work.

Responsibilities
Follow latest developments in PCIe standards
Micro-architecture and design of advanced PCIe and CXL IP, for PCIe7 and beyond
Participate in FPGA prototyping and hardware validation
Run and improve quality checks (ASIC synthesis, CDC/RDC/Linting, simulation)
Collaborate with a worldwide team
Contribute to technical improvements on all aspects of the IP design domain

Qualifications
Required
7+ years of relevant experience
Verilog and System Verilog
Good English skills, communication skills, and willingness to work with an international team.
Additional desirable skills:
Knowledge of UPF
Knowledge of ASIC and FPGA design flow and tools (ASIC Synthesis, CDC / RDC / Linting, Quartus, Vivado)

Mock Interview

Practice Video Interview with JobPe AI

Start Job-Specific Interview
cta

Start Your Job Search Today

Browse through a variety of job opportunities tailored to your skills and preferences. Filter by location, experience, salary, and more to find your perfect fit.

Job Application AI Bot

Job Application AI Bot

Apply to 20+ Portals in one click

Download Now

Download the Mobile App

Instantly access job listings, apply easily, and track applications.

coding practice

Enhance Your Skills

Practice coding challenges to boost your skills

Start Practicing Now
Rambus Chip Technologies logo
Rambus Chip Technologies

Semiconductor Manufacturing

San Jose CA

RecommendedJobs for You

sriperumpudur, chennai, tamil nadu