143 Cpu Jobs - Page 3

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: General Summary: Key Responsibilities: Developing AI SW stack components on Qualcomm NPU/Hexagon DSP Processor Evaluating and optimizing neural network kernels runtime performance Working to enable state of the art neural network layers and new AI SW features to meet customer use-cases Working with architecture team to influence our next generation NPU/Hexagon DSP Processor General Summary: The candidate should possess 3 to 10 years of industry experience in embedded software development with deep learning exposure and having expertise in below areas would be preferred: Strong C and Assembly Programming skills with Strong OS & Multi-Processor concepts Understanding of Deep Learning architectures with hands on experience in compute optimizing the layers used there Strong in mathematical concepts and fixed-point computations In depth understanding of Memory management, MMU, IOMMU etc. Embedded software development in C and C++ on ARM, DSP or similar cores. Strong DSP/CPU processor architecture knowledge Exposure to vector processing on DSP Good debugging skills with experience on debugging with Lauterbach JTAG debuggers. Work on challenging customer requirements and issues. Knowledge of Software/Hardware Security concepts is desirable Strong math back groundFixed point concepts Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronic Engineering, or related field with 3+ years of relevant work experience.ORMaster's degree in Computer Science, Electrical/Electronic Engineering, or related field and 2+ years of relevant work experience.ORPhD in Computer Science, Electrical/Electronic Engineering, or related field with relevant exposure.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore. Please forward your profiles if you meet the requirement. Roles and Responsibilities o Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. o Work closely with design/verification teams within CPU to develop comprehensive test plan. o Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. o Verify power intent through use of methodologies like UPF. o Work closely with system architects, software teams and Soc team to validate system use cases. o Work closely with emulation team to enable verification on emulators and FPGA platforms. o Debug and triage failures in simulation, emulation and/or Silicon. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. o BE/BTech degree in CS/EE with 3+ years"™ experience. o Experience in power management verification. o Implementation of assembly and C language embedded firmware. o Experience in C/C++, scripting languages, Verilog/system Verilog. o Strong understanding of power management features in CPUs and CPU based Socs. o Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred Requirements: o Good Understanding of CPU architectures and CPU micro-architectures. o In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture o Experience with advanced verification techniques such as formal and assertions is a plus o Knowledge and verification experience in DFT and structural debug concepts and methodologiesJTAG, IEEE1500, MBIST, scan dump, memory dump is a plus

Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products. Qualifications You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum (must haves) Bachelor's degree in electrical engineering or computer engineering with 3 to 12 years of experience or a master's degree in electrical engineering or computer engineering. 6+ years of experience in 5 or more of the following: Test Bench bring-up at SoC and strong programming skills in System Verilog, OVM and UVM. Test Plan development experience. Enabling regressions, maintaining QoV (quality of validation) with good functional/code/other coverage metrics. Familiarity with both simulation and emulation environments. Strong CPU/GPU architecture understanding. RTL Debugging module level or soc level system simulation failures. Building emulation models, enabling content. Working with Validation Engineers and central CAD teams to support and maintain verification requirements in terms of Automation and tool flow support. Coordinating with Val team on CAD Requirement with support CAD, IT and Engineering Compute Teams. Act as focal point between design and tool vendors for issues and feature enhancements. Training/Supporting Validation Engineers in CAD tool flow and Infrastructure Monitoring and improve existing simulation environments and simulation efficiency. Experience with Performance Validation of GPUs and automation framework using Python is desirable

Role Senior C++ Developer - High-Performance Trading Systems (Qt Expertise) What We Expect - 4+ years of experience in C++ development, specializing in high-performance, low-latency systems. - Deep expertise in modern C++ (C++14/17/20), multithreading, and concurrency. - Strong Qt development experience for building real-time, high-performance trading UIs. - Experience building ultra-fast order execution engines, market data feeds, and real-time risk management tools. - Strong understanding of networking protocols (TCP/IP, UDP, FIX) and inter process communication (IPC, shared memory, message queues). - Hands-on experience with latency optimization, performance tuning, and profiling tools (perf, Val grind, gprof, etc.). - Proficiency in memory management, lock-free programming, and CPU cache optimization. - A deep understanding of exchange connectivity, order matching engines, and algorithmic trading systems. - A hacker mentality-you love solving problems that seem impossible. What You Will Do - Architect, develop, and optimize ultra-low-latency C++ trading applications that handle millions of transactions per second. - Build high-performance market data processing solutions with microsecond-level latencies. - Develop real-time, intuitive, and high-speed trading interfaces using Qt. - Work on exchange connectivity, FIX protocol integrations, and risk management systems. - Profile and optimize code to achieve maximum throughput and minimal latency. - Solve some of the hardest engineering problems in fintech alongside an elite team. - Experiment with new technologies to stay ahead of the competition. - Own your work end-to-end-from concept to deployment, pushing the limits of what's possible. Must-Have Skills - 4+ years of experience in C++ development, specializing in high-performance, low-latency systems. - Deep expertise in modern C++ (C++14/17/20), multithreading, and concurrency. - Strong Qt development experience for building real-time, high-performance trading UIs. - Experience building ultra-fast order execution engines, market data feeds, and real-time risk management tools. - Strong understanding of networking protocols (TCP/IP, UDP, FIX) and inter process communication (IPC, shared memory, message queues). - Hands-on experience with latency optimization, performance tuning, and profiling tools (perf, Val grind, gprof, etc.). Nice-to-Have Skills - Experience in high-frequency trading (HFT), market-making, or ultra-low-latency environments. - Knowledge of exchange matching algorithms, order routing strategies, and market microstructure. - Contributions to open-source C++ and Qt projects or performance-critical software. - Expertise in hardware acceleration (FPGA, SIMD, AVX, GPU computing). - Familiarity with cloud-based trading infrastructure and hybrid on-prem/cloud systems. Why Join Us - Be part of a high-energy startup with massive growth potential. - Work with visionary fintech leaders and top-tier engineers. - Build industry-defining products that will shape the future of trading. - A culture that values > - Competitive compensation and a real opportunity to lead and innovate. Apply Insights Follow-up Save this job for future reference Did you find something suspiciousReport Here! Hide This Job Click here to hide this job for you. You can also choose to hide all the jobs from the recruiter.

Dreaming big is in our DNA Its who we are as a company Its our culture Its our heritage And more than ever, its our future A future where were always looking forward Always serving up new ways to meet lifes moments A future where we keep dreaming bigger We look for people with passion, talent, and curiosity, and provide them with the teammates, resources and opportunities to unleash their full potential The power we create together when we combine your strengths with ours is unstoppable Are you ready to join a team that dreams as big as you do AB InBev GCC was incorporated in 2014 as a strategic partner for Anheuser-Busch InBev The center leverages the power of data and analytics to drive growth for critical business functions such as operations, finance, people, and technology The teams are transforming Operations through Tech and Analytics, Do You Dream Big We Need You, Job Description Job Title: Specialist Application Location: Bangalore Reporting to: Senior Manager Applications Purpose of the role The role requires the technical management and maintenance of SAP systems, ensuring their stability, performance, and security This person acts as the bridge between SAP applications and the underlying infrastructure (servers, databases, cloud etc ), As the role belongs to global techops, the person would perform stake holder management and collaborate between product, SAP RISE and vendors, The person with solid hands-on experience with SAP technologies like SAP S4 HANA, Web Dispatcher, Business Objects solutions, Cloud Connector, BTP, PIPO, SLT etc and responsible to drive critical incident calls from the technical perspective along with IT Service Management processes such as Incident Management, Event Management / Monitoring, Change Request Management Key tasks & accountabilities Be part of an IT organization which has outsourced many of its activities to vendors, Daily interaction within a virtual organization spread across Global Zones Work in a fast moving & multi-cultural organization, serving the internal customers with a high degree of professionalism, Ability to proceed with quick analysis and decision making, reacting fast to changes while cooperating with different partners, Be confronted with a complex & fragmented IT landscape incorporating various technologies, Manage and support the architecture, design, and health of SAP environments, ensuring seamless operation across systems, Coordinate installation, upgrades, and maintenance of SAP applications to optimize system performance and capabilities, Oversee system integrations, ensuring SAP solutions are effectively linked to other enterprise applications, Act as a technical advisor, providing comprehensive system insights and ensuring timely resolution of critical issues, Maintain up-to-date documentation of system configurations and technical processes, adhering to best practices and compliance standards, Collaborate with zones to understand requirements and translate them into effective SAP solutions, Governance of Compliance Controls such ITGC and MICS Contribute to ongoing development of team capabilities through mentoring and knowledge sharing with peers and stakeholders, Key contacts: (internal external) Internal: Application Architects; Application support team, Compliance team; IT Service Managers, IT Project Managers, External: SAP, Oracle, EPI-USE etc Qualifications, Experience, Skills Level Of Educational Attainment Required University degree level or equal by experience, combining Information Technology and Business management Previous Work Experience 5 -8 years previous work experience Technical Skills Required Strong understanding in Hana High availability, Disaster recovery, Multi tenancy, Restore and Recovery, Replication, Troubleshoot OOM and CPU load issues, Optimize DB performance Hands on experience in SAP Solution Manager 7 2 setups for Technical Monitoring scenarios including BPM, Interface Monitoring, DVMProviding Basis support for projects involving HANA and S/4 HANA Strong Database knowledge (HANA, Oracle, MS SQL, and Sybase ASE) Strong OS level Knowledge (Linux, RHEL, AIX) System optimization Cloud knowledge (AWS, AZURE, GCP, HEC) Should be able to study EWA and provide recommendations as relevant to stake holders, Maintaining DB Parameters, SSL, SNC and SSO configuration, Understanding about SoX and Audit Procedures Ability to execute IT Controls, handle Internal and external Audit from SAP Basis perspective, Hands on experience in SAP Kernel maintenance, SAP Patch management, SAP Application Upgrade, Language installation, SSO Perform core Basis activities like Monitoring, Landscape mgmt , Transport Management, Patching, SAP Kernel and SAP Version Upgrades SAP Transport Management, SAP System Client copy, refresh, and license management, And above all of this, an undying love for beer! We dream big to create future with more cheers

About PhonePe Group: PhonePe is Indias leading digital payments company with 50 crore (500 Million) registered users and 3.7 crore (37 Million) merchants covering over 99% of the postal codes across India. On the back of its leadership in digital payments, PhonePe has expanded into financial services (Insurance, Mutual Funds, Stock Broking, and Lending) as well as adjacent tech-enabled businesses such as Pincode for hyperlocal shopping and Indus App Store which is India's first localized App Store. The PhonePe Group is a portfolio of businesses aligned with the company's vision to offer every Indian an equal opportunity to accelerate their progress by unlocking the flow of money and access to services. Culture At PhonePe, we take extra care to make sure you give your best at work, Everyday! And creating the right environment for you is just one of the things we do. We empower people and trust them to do the right thing. Here, you own your work from start to finish, right from day one. Being enthusiastic about tech is a big part of being at PhonePe. If you like building technology that impacts millions, ideating with some of the best minds in the country and executing on your dreams with purpose and speed, join us! JOB DESCRIPTION Minimum of 1 year of experience in Linux/Unix Administration. Minimum of 2 years of hands on experience with managing infra on public cloud i.e Azure/AWS/GCP Over 4+ years of experience in Hadoop administration. Strong understanding of networking, open-source technologies, and tools. Familiar with best practices and IT operations for maintaining always-up, always-available services. Experience and participation during on-call rotation.Excellent communication skills. Solid expertise in Linux networking, including IP, iptables, and IPsec.Proficient in scripting and coding with languages such as Perl, Golang, or Python. Strong Knowledge of databases like Mysql,Nosql,Sql serverHand on experience with setting up , configuring and Managing Nginx as reverse proxy and load balancing in high traffic environments. Hands-on experience with both private and public cloud environments. Strong troubleshooting skills and operational expertise in areas such as system capacity, bottlenecks, memory, CPU, OS, storage, and networking. Practical experience with the Hadoop stack, including Hdfs,HBase,Hive, Pig, Airflow, YARN, HDFS, Ranger, Kafka, and Druid. Good to have experience with Design,develop and maintain Airflow DAGs and tasks to automate BAU processes,ensuring they are robust,scalable and efficient. Good to have experience with ELK stack administration. Experience in administering Kerberos and LDAP. Familiarity with open-source configuration management and deployment tools like Puppet, Salt, or Ansible.Responsible for the implementation and ongoing administration of Hadoop infrastructure. Experience in capacity planning and performance tuning of Hadoop clusters. Collaborate effectively with infrastructure, network, database, application, and business intelligence teams to ensure high data quality and availability. Develop tools and services to enhance debuggability and supportability.Work closely with security teams to apply Hadoop updates, OS patches, and version upgrades as needed. Troubleshoot complex production issues, identify root causes, and provide mitigation strategies. Work closely with teams to optimize the overall performance of the PhonePe Hadoop ecosystem. Experience with setting up & managing monitoring stack like OpenTsdb,Prometheus,ELK,Grafana,Loki PhonePe Full Time Employee Benefits (Not applicable for Intern or Contract Roles) Insurance Benefits - Medical Insurance, Critical Illness Insurance, Accidental Insurance, Life Insurance Wellness Program - Employee Assistance Program, Onsite Medical Center, Emergency Support System Parental Support - Maternity Benefit, Paternity Benefit Program, Adoption Assistance Program, Day-care Support Program Mobility Benefits - Relocation benefits, Transfer Support Policy, Travel Policy Retirement Benefits - Employee PF Contribution, Flexible PF Contribution, Gratuity, NPS, Leave Encashment Other Benefits - Higher Education Assistance, Car Lease, Salary Advance Policy Working at PhonePe is a rewarding experience! Great people, a work environment that thrives on creativity, the opportunity to take on roles beyond a defined job description are just some of the reasons you should work with us. Read more about PhonePe .

Senior Performance Engineer India - Pune At NICE, we don’t limit our challenges. We challenge our limits. Always. We’re ambitious. We’re game changers. And we play to win. We set the highest standards and execute beyond them. And if you’re like us, we can offer you the ultimate career opportunity that will light a fire within you. So, what’s the role all about? We are seeking a highly skilled Senior Performance Engineer to drive the performance, scalability, and reliability of our complex enterprise software product . This software handles massive transaction loads , operates across multiple operating systems and databases , and is deployable both on-premises and in the cloud . The ideal candidate will have deep expertise in performance testing, profiling, tuning, and optimizations for high-scale, mission-critical applications. How will you make an impact? Performance Engineering: Collaboration with Development and Engineering Teams Collaborate with Software Architects and Developers to optimize code, database queries, and infrastructure configurations. Work closely with Developers, QA Engineers and DevOps teams to integrate performance engineering best practices into the software development lifecycle (SDLC). Provide feedback to the development team on code-level optimizations and scalability improvements. Work with cloud engineering teams to fine-tune autoscaling, caching, and distributed system performance. Troubleshooting and Issue Resolution Investigate and resolve performance-related issues across multiple platforms (web, backend services). Work with teams to implement effective root cause analysis for performance failures. Identify, diagnose, and optimize performance bottlenecks across the entire technology stack (application, database, infrastructure, and cloud environments) Best Practices and Mentoring Establish best practices and mentor engineering teams on performance optimization strategies. Stay up to date with the latest performance engineering trends, methodologies, and emerging technologies. Capacity Planning and Scaling Assist in capacity planning for infrastructure and applications to ensure they can handle expected growth. Collaborate with infrastructure and cloud engineering teams to design systems that are scalable and performant. Performance Testing: Performance Testing and Analysis Design and execute performance benchmarking, load testing, and stress testing strategies. Conduct performance tests to evaluate system behaviour under different load conditions (e.g., load testing, stress testing, scalability testing). Analyse and interpret performance test results, identify bottlenecks, and recommend solutions. Develop performance test plans, test cases, and execution strategies. Track performance metrics and trends over time to ensure consistency and stability of systems. Performance Benchmarking Perform benchmarking activities to understand and measure system performance against industry standards and best practices. Application Monitoring Continuously monitor the performance of applications in cloud-based pre-production environments. Utilize application performance management (APM) tools (e.g., Jprofiler, Open-source tools, etc.) to detect and troubleshoot performance issues. Implement observability solutions, leveraging tools like Prometheus, Grafana, New Relic, Dynatrace, or Datadog for real-time performance monitoring. Automation and Scripting Develop automated scripts and frameworks for creating complex financial data, load, and performance testing. Leverage automation tools (e.g., JMeter, LoadRunner, Gatling) to run performance tests and gather metrics. Develop and maintain performance test suites using industry-standard tools (JMeter, Gatling, LoadRunner, etc.). Reporting and Documentation Create detailed reports with analysis, recommendations, and action plans for performance improvements. Maintain thorough documentation of performance tests, results, and optimization strategies. Have you got what it takes? Education: Bachelor’s or Master’s degree in Computer Science, Information Technology, Engineering, or a related field. Qualifications - Essential: 5-7 years of hands-on experience in performance engineering for enterprise-grade applications Hands-on experience with performance testing tools (e.g., Apache JMeter, LoadRunner, Gatling, NeoLoad or similar). Deep understanding of profiling and tuning JVM-based applications (Java, Scala, Kotlin) or other modern runtime environments. Hands-on experience with database performance tuning (SQL query optimization, indexing, partitioning, caching, replication strategies). Expertise in analysing CPU, memory, disk, and network performance in distributed systems. Strong understanding of multi-threading, concurrency, and memory management . Experience with cloud-based performance optimization (AWS, Azure, or GCP) and containerized environments (Docker, Kubernetes). Familiarity with CI/CD pipelines and integrating performance testing into DevOps workflows. Excellent analytical and problem-solving skills with a deep understanding of system design. Qualifications - Preferred: Experience with intelligent performance monitoring solutions Knowledge of event-driven architectures , Kafka , or messaging systems Previous experience optimizing serverless and microservices architectures Strong scripting skills in Python, Bash, Groovy or PowerShell for automation Familiarity with agile methodologies and DevOps practices Experience with infrastructure-as-code tools (e.g., Terraform, Ansible) Background in security performance testing In-depth knowledge of web technologies (HTTP, HTTPS, REST APIs) and application architectures What’s in it for you? Work on a high-impact, high-scale enterprise software product. Collaborate with top engineering talent in a dynamic, innovative environment. Competitive salary, benefits, and opportunities for career growth . If you are a performance-focused engineer who thrives in complex, high-scale environments, we’d love to hear from you! Enjoy NICE-FLEX! At NICE, we work according to the NICE-FLEX hybrid model, which enables maximum flexibility: 2 days working from the office and 3 days of remote work, each week. Naturally, office days focus on face-to-face meetings, where teamwork and collaborative thinking generate innovation, new ideas, and a vibrant, interactive atmosphere. Requisition ID:6865 Reporting into: Tech Manager Role Type: Senior Performance Engineer

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore. Please forward your profiles if you meet the requirement. Roles and Responsibilities o Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. o Work closely with design/verification teams within CPU to develop comprehensive test plan. o Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. o Verify power intent through use of methodologies like UPF. o Work closely with system architects, software teams and Soc team to validate system use cases. o Work closely with emulation team to enable verification on emulators and FPGA platforms. o Debug and triage failures in simulation, emulation and/or Silicon. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. o BE/BTech degree in CS/EE with 3+ years"™ experience. o Experience in power management verification. o Implementation of assembly and C language embedded firmware. o Experience in C/C++, scripting languages, Verilog/system Verilog. o Strong understanding of power management features in CPUs and CPU based Socs. o Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred Requirements: o Good Understanding of CPU architectures and CPU micro-architectures. o In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture o Experience with advanced verification techniques such as formal and assertions is a plus o Knowledge and verification experience in DFT and structural debug concepts and methodologiesJTAG, IEEE1500, MBIST, scan dump, memory dump is a plus

As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Develop the verification environment and test bench and creating testcases. Debug fails using waveform, trace tools and debug RTL code Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 3 + years of experience in Functional Verification of Processors or ASICs. Minimum 2+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Multi-processor cache coherency, Memory subsystem, IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc Madhu to update ASICs specific skills Knowledge of functional verification methodology - UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Good object-oriented programming skills in C/C++, and any of scripting languages like Python/Perl Development experience on Linux/Unix environments and in GIT repositories and basic understanding of Continues Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in verification coverage closure Preferred technical and professional experience Verify the different functions/components in a PCI Express Controller & high speed SERDES (PHY). Scripting Expertise backed up relevant experience in the same Writing Verification test plans Functional and code coverage analysis and debug

Role & Responsibilities : As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Lead the development of the verification plans, environment, testbenches and writing testcases to verify Cache structures & protocols in processor. Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Work with development team to ensure coverage criteria is met. . Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Required Professional and Technical Expertise : 9 + years of experience in Functional Verification of processors or ASICs. 3+ years of experience in the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor Cache (L2/L3) Coherency, Memory Hierarchy Verification Minimum one full life cycle leadership experience of a processor/SoC verification flow with focus on Cache Coherency Verification Developed test-plans and test strategies for IP/unit/block level verification of Cache Coherency structures in processor/SoC Good object-oriented programming skills in C++/SV, scripting languages like Python/Perl. Knowledge of functional verification methodology like UVM/OVM Knowledge of HDLs (VHDL/Verilog) Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenarios, debugging and triaging fails Experience in driving verification coverage closure. Preferred technical and professional experience Additional skill Stress testing and ability to identify corner case scenarios.

About The Role We are seeking a skilled Infrastructure Support Engineer to join our team. The ideal candidate will have a strong background in managing and supporting on-premises infrastructure, specifically ESXi and VxRail systems, as well as experience with AWS cloud environments. This role requires a proactive approach to system monitoring, troubleshooting, and maintenance, ensuring optimal performance and reliability of our infrastructure. Key Responsibilities: On-Premises Support Manage and support VMware ESXi environments using vSphere, including installation, configuration, and troubleshooting. Install VMware ESXi hypervisors on physical servers. Configure networking, storage, and resource pools for optimal performance. Set up and manage vCenter Server for centralized management of ESXi hosts. Diagnose and resolve issues related to ESXi host performance, connectivity, and VM operation. Use VMware logs and diagnostic tools to identify problems and implement corrective actions. Perform regular health checks and maintenance to ensure optimal performance. Set up monitoring tools to track performance metrics of VMs and hosts, including CPU, memory, disk I/O, and network usage. Identify bottlenecks and inefficiencies in the infrastructure and take corrective action. Generate reports on system performance for management review. Design and implement backup strategies using VMware vSphere Data Protection or third-party solutions (e.g., Veeam, Commvault). Schedule regular backups of VMs and critical data to ensure data integrity and recoverability. Test backup and restoration processes periodically to verify effectiveness. Will be involved in L1 support on rotation Primary Skills AWS Support: Assist in the design, deployment, and management of AWS infrastructure. Monitor AWS resources, ensuring performance, cost-efficiency, and compliance with best practices. Troubleshoot issues related to AWS services (EC2, S3, RDS, etc.) and provide solutions. Collaborate with development teams to support application deployments in AWS environments. Qualifications: - Bachelor's degree in Computer Science or related field. - 5+ years of experience in infrastructure support, specializing in VMware (ESXi), vSphere, and VxRail. - Proven expertise in Linux administration. - Proficient in memory, disk, and CPU monitoring and management. - In-depth understanding of SAN, NFS, NAS. - Thorough knowledge of AWS services (Security/IAM) and architecture. - Skilled in scripting and automation tools (PowerShell, Python, AWS CLI). - Hands-on experience with containerization concepts. - Kubernetes, AWS EKS experience required. - Familiarity with networking concepts, security protocols, and best practices. - Windows administration preferred - Redhat VM / Nutanix Virtualization preferred - Strong problem-solving abilities and ability to work under pressure. - Excellent communication skills and collaborative mindset.

Skills/Experience: Extensive experience in IP/SOC Verification. Must be proficient in System Verilog and UVM. Must have hands-on experience in the verification of the IP protocols such as PCIe/DDR/USB/Ethernet/CXL/HDMI/MIPI/DSI/CS/GLS/CPU Verification or any other high-speed protocols. Experience with scripting language (Python, Perl, TCL etc.) Experience in assembly language or C is a plus. Ability to create testbenches from scratch and own the complete verification including coverage of the subsystem/chip level. Strong debugging capabilities. Education Qualification: BTECH/MTECH in Electrical/Electronics/Computer Science Engineering or Equivalent

About The Role Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products. Qualifications You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum (must haves) Bachelor's degree in electrical engineering or computer engineering with 4 to 9 years of experience or a master's degree in electrical engineering or computer engineering. 4+ years of experience in 5 or more of the following: Test Bench bring-up at SoC and strong programming skills in System Verilog, OVM and UVM. Test Plan development experience. Enabling regressions, maintaining QoV (quality of validation) with good functional/code/other coverage metrics. Familiarity with both simulation and emulation environments. Strong CPU/GPU architecture understanding. RTL Debugging module level or soc level system simulation failures. Monitoring and improve existing simulation environments and simulation efficiency. Good to Have: Building emulation models, enabling content Working with Validation Engineers and central CAD teams to support and maintain verification requirements in terms of Automation and tool flow support. Coordinating with Val team on CAD Requirement with support CAD, IT and Engineering Compute Teams. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

As a CPU Verification Engineer, you will play a pivotal role in the pre-silicon functional and performance verification of our cutting-edge chipsets. Your responsibilities will cover a spectrum of critical areas, including the cache/nest subsystem, interrupt, memory hierarchy, and various on-silicon IP integral to our upcoming IBM Power Systems offerings. Leveraging state-of-the-art techniques, you will be at the forefront of simulating and validating the designs of these bespoke microprocessor-based systems. Key Duties: Verification Environment OwnershipTake charge of the verification environments for microprocessor components, contributing significantly to the identification of functional and performance issues before silicon production. Implement best practices and innovative methodologies to ensure robust and efficient verification processes. Documentation and CommunicationThoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Communicate progress effectively, keeping team members and stakeholders informed of milestones achieved and potential challenges encountered. Required education Bachelor's Degree Preferred education Bachelor's Degree Required technical and professional expertise Functional Verification ExperienceExtensive experience in functional verification of processors, demonstrating a deep understanding of verification methodologies. Computer Architecture KnowledgeGood understanding of computer architecture, including Processor core design specifications, Coherency and Cache Designs, Processor IO subsystem, Interrupt architecture, with expertise in at least any one of the above domains. Multi-Processor Cache CoherencyExperience in verifying multi-processor coherency, cache designs and protocols and memory subsystems, ensuring seamless operation in complex systems. Strong programming skillsProficiency in C++, Python scripting or similar languages. Preferred technical and professional experience Experience with Hardware Description Languages (HDLs)Proficiency in hardware description languages like Verilog and VHDL and general computational logic design and verification concepts. Experience in System-Level VerificationExposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design. Minimum one full life cycle experience of a processor/SoC verification flow with focus Cache Coherency Verification. Knowledge of system-level architecture including buses like AXI/ACE/CHI, AMBA interconnects

About The Role Responsible for power optimization and performance and responsiveness enhancements for Windows platforms in your domain of expertise. Perform deep analysis of software flow for the workload/ usage model at trace/ thread / process ID level and come up with possibilities for power optimization, performance improvement and identify potential issues if any. Work with Platform architects to define metrices for Power and Performance measurement and review projections. Leverage analysis tools to quickly identify battery life and performance issues within your domain of expertise (e.g Graphics, Multimedia, Display, Imaging, CPU) on intel laptop and desktop platforms for Windows OS. Demonstrate technical leadership while troubleshooting complex system level power and performance issues. Collaborate across teams within Intel to identify new power savings features or performance tuning opportunities and drive those optimizations into current and next generation Intel platforms. Drive forward looking tech readiness initiatives based on the analysis done (against the expected behavior/ flow) and influence SoC/ platform architecture/ Windows OS Qualifications BTech / MTech in Electronics or Computer engineering. Experience in embedded systems, working in software/firmware development, integration or validation. Good working knowledge of CPU/SoC and platform components power delivery, displays, sensors, memory, storage, graphics, multimedia, imaging, power management. Understanding of OS fundamentals, system level debug, exposure to hardware, System on Chip, firmware and Device Driver is needed. Knowledge of Windows Driver Debug and Windows Debug tools is good to have. Hands-on power and performance measurement, power and performance analysis, and performance benchmarking experience. Good at problem solving and analysis. Excellent communication and/or interaction skills. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

About The Role Seize the opportunity to work with the team responsible for RTL logic design and microarchitecture of chipsets for PCs millions of people around the world will use. The Chipsets Logic Team, CLIPS is responsible for developing soft IPs, subsystems and gaskets for client and server chipsets.Candidate will be responsible for logic design and development, responsibilities including but not limited to: Develops the logic design, register transfer level (RTL) coding, and simulation for an IP design. Participates in the definition of microarchitecture features of the block being designed. Performs quality checks in various logic design aspects ranging from RTL to timing/power convergence. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for meet the design specification requirements. Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Follows secure development practices to address the security threat model and security objects within the design. Supports SOC to integrate and validate the IP on need basis. Drives quality assurance compliance for smooth IPSoC handoff. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Qualifications : The candidate must possess a minimum of Bachelor Degree in Electronics Engineering, Computer Engineering, Computer Science or equivalent. The candidate should have successful track record of hardware development experience and demonstrated technical leadership skills. The candidate must have demonstrated the ability to solve highly complex technical problems with excellent communication skills. The candidate must also have demonstrated strong ethical standards. Must also be able to perform in a highly ambiguous and dynamic business environment. Hands on experience in IP RTL, Microarchitecture, TFM, synthesis, cdc, lint, spyglass, rdc. Skills : Relevant experience with skills in ASIC IP design flows, RTL coding and Globals (Clocking, Boot/Reset/Fabrics, DfD, Fuse, etc) Experience in subsystem design and IO protocols such as AMBA, USB, PCIe, UCIe, UFS, SATA, UART, SPI, I2C, I3C etc is a plus. Other technical requirements: 8-14 years of relevant pre-silicon logic design experience in ASIC domain. Experienced with various tools and methodologies including but not limited toSystem Verilog, Python/Perl/Shell scripting, Synopsys tools, RTL model build, design-for-test, design-for-verification. Experienced in EDA tools and flows such as Spyglass VCLINT, VCLP, VC-CDC, SG-DFT, Design Complier, Calibre, Fishtail, FEV, ATPG etc. Experienced in developing micro-architecture based on High Level Architecture specifications. Experienced in VLSI or Structural and Physical design flow and methodology. Experienced in Power-aware design and reviewing validation flows. Strong Chipset or CPU level understanding required on power consumption, power estimation and low power design methods. Inside this Business Group In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel's products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore's Law and groundbreaking innovations. DEG is Intel's engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

About The Role Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products. Qualifications Minimum qualifications :- are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Requirements listed below would be obtained through a combination of Industry job-relevant experience, internship experiences and or school. work/classes/research. Education Requirement:- Bachelor's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 9 years of industry work experience, or- Master's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 7 years of industry work experience, or- PhD in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 5 years of related work experience.Minimum Qualifications:- 8+ years of experience in relevant Pre-Silicon validation position having gone through multiple project cycles to gather in-depth know how. Solid work experience in designing, verifying, and validating complex hardware systems.Solid programming skills in C/C++, Verilog, System Verilog, UVM, assembly, and Python.Proficient in debugging SOC, fabric, NOC, memory, various protocols like PCIE or Ethernet, or other complex ASIC designs.Knowledge of advanced computer architecture and micro-architecture concepts.Experience with writing directed and random test cases.Experience with design verification and validation methodologies and strategies.Good communication skills, and a team player.Able to work independently in a fast-paced team and environment. Desired Requirements- Deep knowledge of system architecture including CPU, Data path packet processing flows , Boot Flows, fabrics, interconnects, NOC, memory sub-systems, I/O peripherals (UART/SPI), bus protocols (AXI/APB), PCIE, Ethernet, DMA, CSRs, etc. MACsec , Time-Sensitive Networking (TSN) Experience with boot, reset, clock, and power management. Inside this Business Group The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.

Embedded Developer - LDD we are open this demand for Hyderabad , Chennai and Bangalore locations Embedded Developer - LDD Job descriptions: 4 to 7 yrs of Exp in Embedded Software Domain Proficient in software development using C, C++ and multi-threaded programming. Working experience one or more RTOS like QNX, VxWorks, FreeRTOS, ThreadX is desired. Work experience Mainly LDD, Linux Kernel level experience Experience working with one or more of - BSP, HAL, Bootloader, UART/SPI/I2C/DMA and Board bring up. Understanding into architectures - CPU, MMU, Cache, Interrupts, DMA, ADC/DAC, EEPROM, PWM, Watchdog Timers etc is a plus Exposure ARM/IA 64-bit processors architecture and HW interfaces is a plus Experience in Make, CMake or Buildroot, Dev ops, Jenkins, CI/CT/CD is desirable Bachelors degree in computer science, Engineering, or related field.

About The Role Seize the opportunity to work with the team responsible for RTL logic design and microarchitecture of chipsets for PCs millions of people around the world will use. The Chipsets Logic Team, CLIPS is responsible for developing soft IPs, subsystems and gaskets for client and server chipsets.Candidate will be responsible for logic design and development, responsibilities including but not limited to: Develops the logic design, register transfer level (RTL) coding, and simulation for an IP design. Participates in the definition of microarchitecture features of the block being designed. Performs quality checks in various logic design aspects ranging from RTL to timing/power convergence. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for meet the design specification requirements. Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Follows secure development practices to address the security threat model and security objects within the design. Supports SOC to integrate and validate the IP on need basis. Drives quality assurance compliance for smooth IPSoC handoff. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Qualifications : BE/ME/Btech/Mtech in computer science eng or electronics and Communications. The candidate must possess a minimum of Bachelor Degree in Electronics Engineering, Computer Engineering, Computer Science or equivalent. The candidate should have successful track record of hardware development experience and demonstrated technical leadership skills. The candidate must have demonstrated the ability to solve highly complex technical problems with excellent communication skills. The candidate must also have demonstrated strong ethical standards. Must also be able to perform in a highly ambiguous and dynamic business environment. Skills : Relevant experience with skills in ASIC IP design flows, RTL coding and Globals (Clocking, Boot/Reset/Fabrics, DfD, Fuse, etc) with experience in CDC, linting, spyglass, micro-architecture. Experience in subsystem design and IO protocols such as AMBA, USB, PCIe, UCIe, UFS, SATA, UART, SPI, I2C, I3C etc is a plus. Other technical requirements: 3 to 8 years of relevant pre-silicon logic design experience in ASIC domain. Experienced with various tools and methodologies including but not limited toSystem Verilog, Python/Perl/Shell scripting, Synopsys tools, RTL model build, design-for-test, design-for-verification. Experienced in EDA tools & flows such as Spyglass VCLINT, VCLP, VC-CDC, SG-DFT, Design Complier, Calibre, Fishtail, FEV, ATPG etc. Experienced in developing micro-architecture based on High Level Architecture specifications. Experienced in VLSI or Structural and Physical design flow and methodology. Experienced in Power-aware design and reviewing validation flows. Strong Chipset or CPU level understanding required on power consumption, power estimation and low power design methods. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intels offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements.

Role & responsibilities Job Summary: We are looking for a skilled C & C++ system programmer to develop and maintain the System Tooles for Applying stress and measuring the performance of the CPU cores, memory etc.,. You will work on low level programming, OS internals and System programming: Windows and Linux. The ideal candidate has strong experience in C and C++ Programming, System calls, Kernel space and User space interactions, and experience in stress & performance optimization tools development. Required Skills: 3+ years of experience in system programming to design, develop, test and debug. Solid experience in drivers development and HW interfacing Experience in work with OS Kernel internals, System calls Hands on development & troubleshooting experience on embedded targets Analyze and Develop system Software in C and C++ Implement multi-threading, Synchronization techniques (Semaphore & Mutex) and IPCs Good knowledge on ARM Architecture and Assembly coding Experience in Python scripting Preferred candidate profile Bachelors or Master’s degree in Electronics and Computer science or equivalent Experience working with Widows/Linux OS internals and device drivers is a plus Must be a Immediate joiner Perks and benefits As per company norms

We are looking for a highly skilled Python Backend Developer with a minimum of 4+ years of experience. The candidate will develop and scale platforms to run real-time computer vision models, productionize machine learning models with API designs, and deploy models using Django or any UI. This role requires expertise in Python, Kubernetes, Docker, cloud platforms (Azure, GCP, or AWS), CI/CD, and RESTful APIs. The ideal candidate should have experience building and maintaining ML systems, working with GPU/CPU usage, and performing load, unit, and regression testing. Proficiency in FastAPI, strong communication skills, and the ability to adapt to fast-changing environments are essential.

As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Lead the development of the verificationplans,environment, testbenches and writing testcasesfor theCacheCoherency TransportInterconnectFabric in IBM Server Processors. Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Work with development team to ensure coverage criteria is met. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 9+ years of experience in Functional Verification of processors or ASICs. 3+years of experience inthe followingareas Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processorCacheCoherency/Network on Chip/MemoryHierarchyverification. AXI/AHB/ACE/ACE-lite/CHI/On Chip System Fabricinterfaceverification or any otherProcessor/SoC coherency transport interconnectfabric verification. Minimum one full life cycle leadership experience of a processor/SoC verification flowwith focus on Coherency Transport Interconnectand/or Network on ChipVerification Good object-oriented programming skills in C++/SystermVerilog, scripting languages like Python/Perl. Verification knowledge inClock domain crossing and reset domaincrossing Knowledge of functional verification methodology likeUVM/OVM Knowledge of HDLs (VHDL/Verilog) Developed testplans and test strategies for IP/unit/block level verificationof Coherency Transport Interconnects Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in driving verification coverage closure.

About The Role Defines, develops, and performs SoC level power, thermal, and performance validation and optimization plan across Intel products. Understands the business implications of ensuring power and performance KPIs within target and power and thermal limitations. Drives SoC level usage optimization under specific scenarios, develops key performance indicators and landing zones, power and thermal benchmarks, and drives execution, reporting, and documentation of results. Ratifies optimizations from hardware/software architecture and proposes solutions to software PTP teams. Develops power, thermal, and performance validation methodologies, executes validation plans, and collaborates with other engineers for design optimization, troubleshooting, and failure analysis. Performs SoC level debug to identify root causes and resolves all functional and triage failures for power, thermal, and performance issues. Develops validation infrastructure (e.g., performance monitors, behavioral checkers, state space coverage) and test environment used in validation testing. Configures and sets up data logger for thermal data collection and analysis. Publishes SoC level power, thermal, and performance validation reports summarizing all validation and optimization activities performed, reviews results, and communicates to relevant teams. Works with architecture, design, verification, firmware, software, and platform teams to maintain and improve debug, validation test strategy, methodologies, and processes to ensure power, thermal, and performance meet and exceed product completive targets and specifications. Qualifications You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum skills and experience that will get you noticed:Bachelor's Degree in Electrical Engineering, Computer Engineering, or other related field with 5+ years of relevant experience. Candidate must have of experience with one or more of the following: Microprocessor development IA-32 architecture/micro-architecture, microprocessors, and computer system architecture Low-level software or firmware programming skills Programming languagesPerl/Python, C/C++ Hardware/Software interfaces, interactions, and debug Preferred skills and experience that will make you stand out: Validation and/or testing, especially in processor design teams Pre-Silicon or Post-Silicon CPU debug experience Linux command-line tools Platform architecture and operating system knowledge CPU power management Debugging hardware and software collateral in simulation, emulation, and FPGA environments Pre-Silicon Design and/or Validation/Verification Experience on Emulation Inside this Business Group The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel's transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies"”spanning software, processors, storage, I/O, and networking solutions"”that fuel cloud, communications, enterprise, and government data centers around the world.

About The Role We are looking for an experienced Software Engineer eager to work on 3D driver development for games, workstation applications and media. As a GPU Software Development Engineer, you will play a crucial role in developing and optimizing software solutions for Intel's cutting-edge GPU technologies. You will work closely with hardware engineers, software developers, and other cross-functional teams to deliver high-performance and innovative GPU solutions.Responsibilities: Design, develop, and optimize GPU software solutions for Intel's GPU products. Collaborate with hardware engineers to ensure seamless integration of software and hardware components. Conduct performance analysis and optimization to ensure high efficiency and performance of GPU software. Debug and resolve software issues related to GPU functionality. Participate in code reviews and provide constructive feedback to team members. Stay up-to-date with the latest advancements in GPU technologies and industry trends. Develop and maintain GPU drivers, libraries, and tools. Qualifications 5+ years of programming and debugging experience in C/C++. Knowledge of graphics APIs such as DirectX, Vulkan, and OpenGL. Strong analytical and problem-solving skills, with the ability to work methodically on complex issues. Strong verbal and written communication skills to collaborate effectively with team members and stakeholders. Master's degree in Software Engineering, Computer Engineering, Computer Science, or a related field.Nice to have: Familiarity with scripting languages (e.g., Python). Familiarity with GPU driver development and debugging tools (e.g., Visual Studio, WinDbg, GPUView). Understanding of display graphics drivers, media, and related areas. Expertise in the analysis and optimization of GPU and CPU performance. Solid understanding of GPU architecture and parallel computing concepts. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

About The Role You will be part of Intel Data Center and AI group driving Intel's latest AI SoCs in the World's leading process technologies. In this role you will be responsible to develop SoC / SS pre-Silicon functional verification environment along with a team of highly skilled engineers to verify system level design . Your role spans end to end Pre-Silicon verification from verification architecture definition to PRQ/ customer support.We're looking for a highly motivated, Pre-Silicon Verification Lead Engineer who will be responsible to : Define Verification architecture that is scalable across multi level verification for most advanced multi die SoCs Define domain level verification plan Develop VIPs, protocol checkers, scoreboards. Define coverage, assertion based verification methodologies. Work directly with hardware architects, logic designers to influence overall SoC and system design. Mentor and technically lead junior engineers. Qualifications Candidate should have a Bachelors/ Masters in Electrical or Computer Science Engineering or related field with 15+ years of technical experience. Related technical experience should be in/withSilicon Design and/or Validation/Verification.Preferred QualificationsExperience in CPU/ GPU verification Experience with SV/ UVM Language Experience with Formal verification techniques is a plus Strong background in scripting - PERL/Python System hardware and software debug skills Understanding of software hardware co-validation techniques Solid understanding of system and processor architecture, advanced memory and IO technologies Candidate should demonstrate excellent Self-motivation, communication, strong problem solving, excellent in cross-site communication and teamwork skills. Inside this Business Group The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel's transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies"”spanning software, processors, storage, I/O, and networking solutions"”that fuel cloud, communications, enterprise, and government data centers around the world.