157 Cpu Jobs - Page 3

This is an excellent opportunity to join Cisco's Unified Computing Systems (UCS) team working in Cisco's Data Center space. The Cisco UCS Rack Server is a compact, high-density server optimized for performance and efficiency, suitable for various applications such as virtualization and bare-metal workloads. This server can function as a standalone unit managed by Cisco Intersight or UCS Manager, demonstrating the full range of Cisco's unified computing benefits and enhancing business agility. Our team values open communications, empowerment, innovation, partnership, and customer success as foundational principles. You will collaborate with the Computing Systems product group, a global organization encompassing development, sqa, tme, product management, and program management teams. This group is responsible for delivering innovative end-to-end configurations for rack and blade servers, from firmware revisions to i/o connectivity, enabling sophisticated data centers as a service (ITaaS). The current product portfolio includes unified computing servers, both blade and rack models, and UCS management software that simplifies access and control of the complete end-to-end solution. As part of the UCS validation team at Cisco, Bangalore, you will have the opportunity to work with the latest technologies and trends in server and storage areas. The role involves validating the Cisco c-series and s-series rack BMC, debugging and solving issues, performing first-level issue triage, studying industry specifications and vendor hardware documentation, and designing test cases. We are looking for an SQA Engineer with 3-5 years of experience specializing in rack or blade server validation. The ideal candidate should possess hands-on experience in server BMC validation, knowledge in CPU/memory/PCI subsystems, understanding of Intel/AMD server platforms, nvme, gpus, system architecture, operating systems concepts, third-party adopters, configuration utilities, and automation scripting in languages like Tcl, expect, and python. At Cisco, we are committed to developing innovative technology to power a more inclusive, digital future for everyone. We value diversity, equality, and inclusivity, and we support each other in achieving collective success. Our inclusive communities bring people together around commonalities or passions, fostering a culture of learning, listening, and caring for our communities. Join us in making the world a better place through technology and collective efforts. Be yourself at Cisco and contribute to our mission of creating a more inclusive future.,

System Programming with strong fundamentals in C Programming Experience in the area of Intel X86 processor-based system architectures, processor and chipsets, Memory management, Error management etc. Experience in EDKIi, Open-Source BIOS development and Initialization functionality for enterprise servers. In-depth understanding of Industry standards, such as, BMC, CPU (Intel X86), Intel PCH, MRC, PCle. HW debugging experience - ITP, Lauterbach or similar HW Debugging tools.

Primary Skills: Embedded C, RTOS, Baremetal, Firmware Development, GPU, CPU • Port and develop tests* for bare metal environments on mobile SoC platforms. Design, implement, and debug firmware* for embedded systems, ensuring robust and scalable solutions. Work closely with hardware teams* to define system requirements and validate hardware functionality. Utilize JTAG and other debugging tools* for low-level troubleshooting and validation. Develop and execute test plans* for various SoC subsystems (CPU, GPU, multimedia, TPU, PCIe, USB). Optimize code* for performance, efficiency, and memory usage in resource-constrained environments. Automate test execution* and reporting using Python or Bash scripts. Document test procedures, results, and codebase* for maintainability and knowledge sharing Proficiency in C and Assembly programming* for embedded systems. Experience with firmware development* and debugging on baremetal or RTOS environments. Strong understanding of JTAG and other hardware debugging interfaces. Hands-on experience with at least two SoC subsystems:* CPU, GPU, multimedia, TPU, PCIe, or USB. Familiarity with SoC architectures* and low-level hardware/software interaction. Experience with test automation* using Python or Bash is a plus. Excellent problem-solving skills and attention to detail. Strong communication and teamwork abilities.

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Software Engineer, you will design, develop, create, modify, and validate embedded and cloud edge software, applications, and/or specialized utility programs that launch cutting-edge, world class products that meet and exceed customer needs. Qualcomm Software Engineers collaborate with systems, hardware, architecture, test engineers, and other teams to design system-level software solutions and obtain information on performance requirements and interfaces. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. 2+ years of work experience with Programming Language such as C, C++, Java, Python, etc. Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. GENERAL SUMMARY As a SoC RAS and Manageability Controller FW Developer, you are responsible for working with a team on the enablement of the SoC and Platform management solution for Qualcomm's upcoming products. You will collaborate internally to help define and implement embedded firmware to manage the error, debug and telemetry management features for the Qualcomm SoCs across many verticals. You will also participate in various other aspects of the management controller firmware development, including power management, boot, RAS, debug, security and runtime services. In SoC Management Controller FW developer role you will be working closely both with the hardware and firmware development teams. You will have an opportunity to engage with third parties on enablement of new platforms, as well as providing input to our SoC and platform architects on future designs. Role and Responsibilities Drive the complete firmware development lifecycle through design, development, debug and verification, in pre-silicon and post-silicon environments. Develop core firmware stack, utilizing and RTOS, that provides the essential services and frameworks to various algorithms running on the power management controller. Assist in defining Reliability, Availability and Serviceability solutions for future generation of Qualcomm CPUs. Actively engage with open source communities to contribute support for processor architectures, device drivers, and firmware features Collaborate with team members and other teams on silicon and platform bring-up, debug and diagnostics. Assist in identifying skills requirements and in hiring engineers, Preferred Qualifications BS/BEng in Electrical, Computer Engineering, or Computer Science (or equivalent professional experience) with 8 years experience in embedded firmware development Familiarity with Error reporting and manageability requirements on a datacenter server platform. Familiarity with ARM RAS specification, ARM CPU RAS extensions, and Software components (SDEI, APEI, UEFI CPER) specifications is preferred. Self-starter who takes initiative and brings technical leadership Proficient writing and debugging C and assembly Driver development experience in RTOS or OS Kernel environments Demonstrated development experience with embedded OSes such as Zephyr, eCos, uC/OS or FreeRTOS Experience developing and debugging in pre-silicon environments including simulators and FPGA emulation Experience defining interprocessor communication interfaces between embedded controllers and the platform Familiarity with ARM v8 architecture. Development experience for a ARMV8 platform is a plus. Physical Frequently transports between offices, buildings, and campuses up to mile. Frequently transports and installs equipment up to 5 lbs. Performs required tasks at various heights (e.g., standing or sitting). Monitors and utilizes computers and test equipment for more than 6 hours a day. Continuous communication which includes the comprehension of information with colleagues, customers, and vendors both in person and remotely. Minimum Qualifications Education Bachelors - Computer Science, Bachelors - Engineering, Bachelors - Information Systems Work Experiences 4+ years experience with Programming Language such as C, C++, Java, Python, etc. ,8+ years of Software Engineering or related work experience

Job Overview: As a Site Reliability Engineer (SRE) specializing in DataPlatform OnPremise, you will play a critical role in deployment, ensuring the reliability, scalability, and performance of our Cloudera Data Platform (CDP) infrastructure. You will collaborate closely with cross-functional teams to design, implement, and maintain robust systems that support our data-driven initiatives. The ideal candidate will have a deep understanding of Data Platform, strong troubleshooting skills, and a proactive mindset towards automation and optimization.You will play a pivotal role in ensuring the smooth functioning, operation, performance and security of large high density Cloudera-based infrastructure. Roles and Responsibilities: Work on tasks related to implementation of Cloudera Data Platform Cloudera Data Platform on-premises and be a part of planning, installation, configuration, and integration with existing systems. Infrastructure ManagementManage and maintain the Cloudera-based infrastructure, ensuring optimal performance, high availability, and scalability. This includes monitoring system health, and performing routine maintenance tasks. Strong troubleshooting skills and operational expertise in areas such as system capacity, bottlenecks, memory, CPU, OS, storage, and networking. Creating Runbooks and automating them using scripting tools like Shell scripting, Python etc. Working knowledge with any of the configuration management tools like Terraform, Ansible or SALT Data Security and ComplianceImplement and enforce security best practices to safeguard data integrity and confidentiality within the Cloudera environment. Ensure compliance with relevant regulations and standards (e.g., GDPR, HIPAA, DPR). Performance OptimizationContinuously optimize the Cloudera infrastructure to enhance performance, efficiency, and cost-effectiveness. Identify and resolve bottlenecks, tune configurations, and implement best practices for resource utilization. Capacity PlanningPlanning and performance tuning of Hadoop clusters, Monitor resource utilization trends and plan for future capacity needs. Proactively identify potential capacity constraints and propose solutions to address them. Collaborate effectively with infrastructure, network, database, application, and business intelligence teams to ensure high data quality and availability. Work closely with teams to optimize the overall performance of the PhonePe Hadoop ecosystem. Backup and Disaster RecoveryImplement robust backup and disaster recovery strategies to ensure data protection and business continuity. Test and maintain backup and recovery procedures regularly. Develop tools and services to enhance debuggability and supportability. Patches & UpgradesRoutinely apply recommended patches and perform rolling upgrades of the platform in accordance with the advisory from Cloudera, InfoSec and Compliance. Documentation and Knowledge SharingCreate comprehensive documentation for configurations, processes, and procedures related to the Cloudera Data Platform. Share knowledge and best practices with team members to foster continuous learning and improvement. Collaboration and CommunicationCollaborate effectively with cross-functional teams including data engineers, developers, and IT operations personnel. Communicate project status, issues, and resolutions clearly and promptly. Skills Required: Bachelor's degree in Computer Science, Engineering, or related field. Proficiency in Linux system administration, shell scripting, and networking concepts including IPtables, and IPsec. Strong understanding of networking, open-source technologies, and tools. 3-5 years of experience in the design, set up, and management of large-scale Hadoop clusters, ensuring high availability, fault tolerance, and performance optimization. Strong understanding of distributed computing principles and experience with Hadoop ecosystem technologies (HDFS, MapReduce, YARN, Hive, Spark, etc.). Experience with Kerberos and LDAP. Strong Knowledge of databases like Mysql,Nosql,Sql server Hands-on experience with configuration management tools (e.g., Salt,Ansible, Puppet, Chef). Strong scripting skills (e.g., PERL,Python, Bash) for automation and troubleshooting. Experience with monitoring and logging solutions (e.g., Prometheus, Grafana, ELK stack). Knowledge of networking principles and protocols (TCP/IP, UDP, DNS, DHCP, etc.). Experience with managing *nix based machines and strong working knowledge of quintessential Unix programs and tools (e.g. Ubuntu, Fedora, Redhat, etc.) Excellent communication skills and the ability to collaborate effectively with cross-functional teams. Excellent analytical, problem-solving, and troubleshooting skills.. Proven ability to work well under pressure and manage multiple priorities simultaneously. Good To Have: Cloudera Certified Administrator (CCA) or Cloudera Certified Professional (CCP) certification preferred. Minimum 2 years of experience in managing and administering medium/large hadoop based environments (>100 machines), including Cloudera Data Platform (CDP) experience is highly desirable. Familiarity with Open Data Lake components such as Ozone, Iceberg, Spark, Flink, etc. Familiarity with containerization and orchestration technologies (e.g. Docker, Kubernetes, OpenShift) is a plus Design,develop and maintain Airflow DAGs and tasks to automate BAU processes,ensuring they are robust,scalable and efficient. PhonePe Full Time Employee Benefits (Not applicable for Intern or Contract Roles) Insurance Benefits - Medical Insurance, Critical Illness Insurance, Accidental Insurance, Life Insurance Wellness Program - Employee Assistance Program, Onsite Medical Center, Emergency Support System Parental Support - Maternity Benefit, Paternity Benefit Program, Adoption Assistance Program, Day-care Support Program Mobility Benefits - Relocation benefits, Transfer Support Policy, Travel Policy Retirement Benefits - Employee PF Contribution, Flexible PF Contribution, Gratuity, NPS, Leave Encashment Other Benefits - Higher Education Assistance, Car Lease, Salary Advance Policy Working at PhonePe is a rewarding experience! Great people, a work environment that thrives on creativity, the opportunity to take on roles beyond a defined job description are just some of the reasons you should work with us. Read more about PhonePe on our blog. Life at PhonePe PhonePe in the news

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 12 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Nice to haves - Knowledge of instruction dispatch and Arithmetic unit. - Knowledge of test generation tools and working with ISA reference model. - Experience with translating ISA specifications to testplan. - Knowledge of verification principles and coverage. - Understanding of Agile development processes. - Experience with DevOps design methodologies and tools.

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Software Engineer, you will design, develop, create, modify, and validate embedded and cloud edge software, applications, and/or specialized utility programs that launch cutting-edge, world class products that meet and exceed customer needs. Qualcomm Software Engineers collaborate with systems, hardware, architecture, test engineers, and other teams to design system-level software solutions and obtain information on performance requirements and interfaces. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. 2+ years of work experience with Programming Language such as C, C++, Java, Python, etc. Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. GENERAL SUMMARY As a SoC RAS and Manageability Controller FW Developer, you are responsible for working with a team on the enablement of the SoC and Platform management solution for Qualcomm's upcoming products. You will collaborate internally to help define and implement embedded firmware to manage the error, debug and telemetry management features for the Qualcomm SoCs across many verticals. You will also participate in various other aspects of the management controller firmware development, including power management, boot, RAS, debug, security and runtime services. In SoC Management Controller FW developer role you will be working closely both with the hardware and firmware development teams. You will have an opportunity to engage with third parties on enablement of new platforms, as well as providing input to our SoC and platform architects on future designs. Role and Responsibilities Drive the complete firmware development lifecycle through design, development, debug and verification, in pre-silicon and post-silicon environments. Develop core firmware stack, utilizing and RTOS, that provides the essential services and frameworks to various algorithms running on the power management controller. Assist in defining Reliability, Availability and Serviceability solutions for future generation of Qualcomm CPUs. Actively engage with open source communities to contribute support for processor architectures, device drivers, and firmware features Collaborate with team members and other teams on silicon and platform bring-up, debug and diagnostics. Assist in identifying skills requirements and in hiring engineers, Preferred Qualifications BS/BEng in Electrical, Computer Engineering, or Computer Science (or equivalent professional experience) with 8 years experience in embedded firmware development Familiarity with Error reporting and manageability requirements on a datacenter server platform. Familiarity with ARM RAS specification, ARM CPU RAS extensions, and Software components (SDEI, APEI, UEFI CPER) specifications is preferred. Self-starter who takes initiative and brings technical leadership Proficient writing and debugging C and assembly Driver development experience in RTOS or OS Kernel environments Demonstrated development experience with embedded OSes such as Zephyr, eCos, uC/OS or FreeRTOS Experience developing and debugging in pre-silicon environments including simulators and FPGA emulation Experience defining interprocessor communication interfaces between embedded controllers and the platform Familiarity with ARM v8 architecture. Development experience for a ARMV8 platform is a plus. Physical Frequently transports between offices, buildings, and campuses up to mile. Frequently transports and installs equipment up to 5 lbs. Performs required tasks at various heights (e.g., standing or sitting). Monitors and utilizes computers and test equipment for more than 6 hours a day. Continuous communication which includes the comprehension of information with colleagues, customers, and vendors both in person and remotely. Minimum Qualifications Education Bachelors - Computer Science, Bachelors - Engineering, Bachelors - Information Systems Work Experiences 4+ years experience with Programming Language such as C, C++, Java, Python, etc. ,8+ years of Software Engineering or related work experience

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: We are seeking candidates with strong optimized software development knowledge and hands-on experience AI. You will be working in a team responsible for comprehensiveness and enhancement of Performance Optimization tools of state-of-the-art machine learning solutions on Snapdragon platform.You will be working on technical initiatives to continuously benchmark the AI optimization workflow that will serve as relevant, reference case studies for application developers for Windows on Snapdragon. You will drive improvements into the SW stack including SDK, Tools, and documentation that will directly impact the ease of use and performance realization by Windows Application Developers on Snapdragon. You will work closely with development leads, software and hardware architects, customer engineers, and application developers. Responsibilities: Understand trends in ML model design, and workflow through application developer engagements and latest academic research Continuously measure KPIs for AI development tools on Windows on Snapdragon in terms of level of automation, ease of use, and resulting performance and accuracy preservation Competitive benchmarking of tools and workflow on competitive platforms on state-of-the-art models Enhancement of AI performance debug, analysis, and optimization tools for AI application development for Windows on Snapdragon so that Application Developers have nil to very low barrier to entry for Windows on Snapdragon Interface with 3rd party application developers and other cross-site and cross-functional teams to arrive at best-in-class performant tools, and documentation that are directly leveraged by 3rd party app developers for Windows on Snapdragon Contribute new features and designs to the Qualcomm AI toolkit to enhance the workflow experience of Application Developers Skills and Experience: 7-11 years’ experience in AI application development Experience in building LLM applications using AI/ML tools/workflow preferably on Windows on CPU, GPU, NPU Ability to code in C, C++, and Python Experience with performance optimization of AI on GPU, NPU, CPU a plus Strong communication skills (written and verbal) Demonstrated ability to learn, think and adapt in a fast-changing environment Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. 2+ years of work experience with Programming Language such as C, C++, Java, Python, etc.

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: CPU architecture team is driving the core math libraries needed for ML/AI acceleration. This position/s will expose you to Qualcomm’s cutting edge SoC and ML/AI platforms in the industry. Participate in Optimizing the core ML kernels using the latest advancements like SME, SVE of the ARM CPU architecture and enhance the performance of the ML models on the CPU of the QCOM Soc Required Skills== 3+ experince with Understanding of ARM CPU architecture fundamentals and ARM Arch64 ISA Optimizing kernels for vector Processors Understanding of the basic linear algebra functions used in AI/ML Algorithm design (logic, critical thinking) Performance Evaluation and Optimization of the applications for ARM architecture Inferencing of the ML models written in Pytorch/TensorFlow/Keras Understanding of the typical Open-Source Library framework design Preferred Skills=== Strong Programming skills and deep understanding of the ARM ISA understanding of the algorithms suitable for Vector and matrix accelerators Strong Analytical and debugging skills Good understanding of Optimizing the Linear Algebra algorithms Performance evaluation using QEMU, Simulators, Emulators and on Real Hardware Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore. Please forward your profiles if you meet the requirement. Roles and Responsibilities o Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. o Work closely with design/verification teams within CPU to develop comprehensive test plan. o Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. o Verify power intent through use of methodologies like UPF. o Work closely with system architects, software teams and Soc team to validate system use cases. o Work closely with emulation team to enable verification on emulators and FPGA platforms. o Debug and triage failures in simulation, emulation and/or Silicon. o BE/BTech degree in CS/EE with 3+ years’ experience. o Experience in power management verification. o Implementation of assembly and C language embedded firmware. o Experience in C/C++, scripting languages, Verilog/system Verilog. o Strong understanding of power management features in CPUs and CPU based Socs. o Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred : o Good Understanding of CPU architectures and CPU micro-architectures. o In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture o Experience with advanced verification techniques such as formal and assertions is a plus o Knowledge and verification experience in DFT and structural debug concepts and methodologiesJTAG, IEEE1500, MBIST, scan dump, memory dump is a plus Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 7+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Machine Learning Engineering General Summary: CPU architecture team is driving the core math libraries needed for ML/AI acceleration. This position/s will expose you to Qualcomm’s cutting edge SoC and ML/AI platforms in the industry. Participate in Optimizing the core ML kernels using the latest advancements like SME, SVE of the ARM CPU architecture and enhance the performance of the ML models on the CPU of the QCOM Soc Required Skills== 7+ experince with Understanding of ARM CPU architecture fundamentals and ARM Arch64 ISA Optimizing kernels for vector Processors Understanding of the basic linear algebra functions used in AI/ML Algorithm design (logic, critical thinking) Performance Evaluation and Optimization of the applications for ARM architecture Inferencing of the ML models written in Pytorch/TensorFlow/Keras Understanding of the typical Open-Source Library framework design Preferred Skills=== Strong Programming skills and deep understanding of the ARM ISA understanding of the algorithms suitable for Vector and matrix accelerators Strong Analytical and debugging skills Good understanding of Optimizing the Linear Algebra algorithms Performance evaluation using QEMU, Simulators, Emulators and on Real Hardware Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. 2+ years of work experience with Programming Language such as C, C++, Java, Python, etc.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. SRAM DESIGN

Overview: TekWissen is a global workforce management provider throughout India and many other countries in the world. Position: BIOS -UEFI -Coreboot Location: Bangalore Work Type: Onsite Job Type: Full time Job Description: 5-15 years of experience in the x86 coreboot/FSP/BIOS development Experience with x86 CPU/APU architectures and associated compilation tools Expert in C language Experience with platform bring-up Familiar with coreboot boot stages, UPDs, memory map, FSP, devicetree concept, payloads to OS bootloader handoff Working experience of industry standard protocols like PCIe, SPI, eSPI, ACPI, SMM Experience on working with opensource coreboot project & mainboard related porting with GPIO, PCIe lanes, board fmd configs and board bring-up experience on customer platforms. Experience on working with Intel FSP package source code and understanding of coreboot & FSP boot flow Understanding of coreboot & FSP build tools and build processes Experience of working with different coreboot payloads like edk2, SeaBios, Tianocore etc Ability to read platform Hardware and Processor specifications to understand the coreboot mainboard porting required Good understanding of UEFI framework concepts to port UEFI code to FSP Additional Skillset : Working knowledge of Git for code reviews, source code management, and BIOS releases to QA. Ability to juggle tasks and respond to different teams for various requests for custom BIOS requirements. Good understanding of x86-64 architecture from BIOS developers perspective. Good understanding of UEFI BIOS Boot flow. Basic understanding of Linux Kernel like software development concepts (Kconfig). Academic credentials: Bachelors degree in computer science engineering from reputed college Master’s degree from reputed university is a big plus TekWissen® Group is an equal opportunity employer supporting workforce diversity.

About Us: Tessolve offers a unique combination of pre-silicon and post-silicon expertise to provide an efficient turnkey solution for silicon bring-up, and spec to the product. With 3200+ employees worldwide, Tessolve provides a one-stop-shop solution with full-fledged hardware and software capabilities, including its advanced silicon and system testing labs. Tessolve offers a Turnkey ASIC Solution, from design to packaged parts. Tessolves design services include solutions on advanced process nodes with a healthy eco-system relationship with EDA, IP, and foundries. Our front-end design strengths integrated with the knowledge from the backend flow, allows Tessolve to catch design flaws ahead in the cycle, thus reducing expensive re-design costs, and risks. We actively invest in the R&D center of excellence initiatives such as 5G, mmWave, Silicon photonics, HSIO, HBM/HPI, system-level test, and others. Tessolve also offers end-to-end product design services in the embedded domain from concept to manufacturing under an ODM model with application expertise in Avionics, Automotive, Industrial and Medical segments. Tessolves Embedded Engineering services enable customers a faster time-to-market through deep domain expertise, innovative ideas, diverse embedded hardware & software services, and built-in infrastructure with world-class lab facilities. Tessolves clientele includes Tier 1 clients across multiple market segments, 9 of the top 10 semiconductor companies, start-ups, and government entities. We have a global presence over 12 countries with office locations in the United States, India, Singapore, Malaysia, Germany, United Kingdom, Canada, UK, Japan, Taiwan, Philippines, and Test Labs in India, Singapore, Malaysia, Austin, San Jose. Role - Baremetal Test Development Engineer - Mobile SoC: Notice - Immediate to 20 Days Experience - 7-20 Years Employer - Tessolve Semiconductors Job Location : Bangalore ( Work from office ) Note - Peoples whose below skills are not met kindly ignore this apply only it it meets your skills What you'll do Proficiency in C and Assembly programming* for embedded systems. Experience with firmware development* and debugging on baremetal or RTOS environments. Strong understanding of JTAG and other hardware debugging interfaces. Hands-on experience with at least two SoC subsystems:* CPU, GPU, multimedia, TPU, PCIe, or USB. Familiarity with SoC architectures* and low-level hardware/software interaction. Experience with test automation* using Python or Bash is a plus. Excellent problem-solving skills and attention to detail. Strong communication and teamwork abilities. Tessolve Semiconductor Private Limited, as well as its affiliates and subsidiaries ( Tessolve ) does not require job applicants to make any payments at any stage of the hiring process. Any request for payment in exchange for a job opportunity at Tessolve is fraudulent and should be ignored. If you receive any such communication, we strongly advise you to refrain from making any payments and to promptly report the incident to us at hr@tessolve.com. Tessolve is not responsible for any losses incurred due to such fraudulent activities Interested candidates pls send me your updated resumes to shreyas.ramesh@tessolve.com / References are welcome Thanks, Shreyas. R TA - Team , Tessolve

- Lead the architecture, design and development of Instruction Sequencing Unit for high-performance Processor CPU of IBM Systems. - Architect and design Instruction Dispatch to Issue queues, Register Renaming for Out of Order Execution, Issue instructions to Execution Pipelines, Reordering Buffers for completion of a high performance processor CPU - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 8 or more years of demonstrated experience in architecting and designing Instruction Dispatch unit of CPU - Hands of experience of implementing Issue Queues, Register renaming and forwarding, Reordering Buffer and Pipeline flush/exception handling - Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - At least 1 generation of Processor Core silicon bring up experience - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Nice to haves - Knowledge of Instruction Decode and Execution units - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Knowledge of one object oriented language and scripting language - Understanding of Agile development processes - Experience with DevOps design methodologies and tools

Lead the architecture, design and development of Processor Core Vector- Scalar Execution unit for high-performance IBM Systems. - Architect and design Fixed point/Floating point/Vector/SIMD/Crypto instructions of a high performance processor CPU - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Doctorate Degree Required technical and professional expertise 12 or more years of demonstrated experience in architecting and designing Execution unit of CPU - Hands on experience of implementing Arithmetic/Crypto/SIMD functions - Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - At least 1 generation of Processor Core silicon bring up experience - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Nice to haves - Knowledge of instruction dispatch and load/store units - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Knowledge of one object oriented language and scripting language - Understanding of Agile development processes - Experience with DevOps design methodologies and tools Preferred technical and professional experience Hiring manager and Recruiter should collaborate to create the relevant verbiage.

Lead the architecture, design and development of Processor Core Load- Store Execution unit for high-performance IBM Systems. - Architect and design Load and Store pipelines, D-Cache, Address Translation, Out of Order Execution of a high performance processor CPU - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Doctorate Degree Required technical and professional expertise 12 or more years of demonstrated experience in architecting and designing Load-Store Execution unit of CPU - Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. - Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - At least 1 generation of Processor Core silicon bring up experience - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Nice to haves - Knowledge of instruction dispatch and Arithmetic units - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Knowledge of one object oriented language and scripting language - Understanding of Agile development processes - Experience with DevOps design methodologies and tools Preferred Education

Role & responsibilities Candidate should be having experience in Mortgage underwriting of minimum 2-3 years. He/she should be well versed about Collateral underwriting. For the first 9-10 months, they would be Depute to Kurla for handling Co-lending activities. Post that they will move back to CPU credit (Mortgages) or will be on and off depending on Co-lending volumes. Preferred candidate profile Candidate should be from NBFC background. Interested candidate can share the resume on samiksha.shewale@piramal.com or deborah.reddy@piramal.com

Roles & Responsibility Experience with configuration management tools. Experience in software/hardware implementation. Experience with other cloud platforms (AWS, Azure). Experience with enterprise production Linux environments. Installation and configuration for the systems. Competency with infrastructure as code. Very strong understanding of computing fundamentals (CPU and RAM interaction, disk I/O, etc). Responsibilities :- Set up accounts and workstations Monitor performance and maintain systems according to requirements Troubleshoot issues and outages Ensure security through access controls, backups and firewalls Upgrade systems with new releases and models Develop expertise to train staff on new technologies Build an internal wiki with technical documentation, manuals and IT policies Job Requirements Responsibilities :- Proven experience as a System Administrator or a similar role. Experience with databases, networks (LAN, WAN) and patch management Knowledge of system security (e.g. intrusion detection systems) and data backup/recovery Hands on experience with Linus OS and Windows OS is a must.

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world Our mission is to build great products that accelerate next-generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded Underpinning our mission is the AMD culture We push the limits of innovation to solve the worlds most important challenges We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives AMD together we advance_ Job Title: Director, x86 CPU Cores Performance Verification Location: Bangalore Experience: 20-22 years The Role We are looking for a results-driven and strategic Director of x86 CPU Performance Verification to lead the development, implementation, and scaling of our performance verification strategy across next-gen CPU cores In this critical leadership role, you will be responsible for managing a world-class team, defining infrastructure and methodology, and ensuring our CPUs meet and exceed their performance targets from early RTL through post-silicon Youll work across architecture, design, functional verification, and software teams to bridge performance intent with silicon reality If you thrive in fast-paced environments, love solving performance bottlenecks, and are passionate about building and mentoring high-impact teams?this is the opportunity for you We are seeking a visionary and technically accomplished Director of CPU Cores Performance Verification to lead our efforts in verifying and optimizing performance for next generation x86 CPU cores The ideal candidate will have deep expertise in CPU microarchitecture, performance modeling, and verification, with a strong background in performance infrastructure, emulation, and AI-driven methodologies The Person You are a visionary leader with deep technical expertise in CPU microarchitecture and performance validation You combine strong engineering fundamentals with the ability to scale teams and systems You are comfortable navigating ambiguity, influencing stakeholders across domains, and delivering results under pressure You lead with empathy, invest in people, and believe that high-performing teams are built on trust, feedback, and a shared sense of purpose Key Responsibilities Team Leadership Lead and mentor a high-performing team of performance verification engineers Foster a culture of innovation, technical rigor, and continuous improvement Provide strategic direction across multiple concurrent verification programs Program Leadership Define and execute the performance verification strategy for high-performance x86 CPU cores Collaborate with architecture, u-arch, RTL, performance modeling, firmware, and software teams to define and validate performance KPIs Ensure timely delivery of simulation/emulation results, and optimization feedback loops Performance Analysis & Correlation Develop and execute performance verification plans targeting IPC, latency, throughput, and power efficiency Validate and debug Performance Monitoring Counters (PMC) to ensure accurate performance visibility Drive correlation between RTL and performance models, ensuring architectural intent is met Analyze performance bottlenecks using simulation, emulation, and silicon data Toolchain & Methodology Build and maintain scalable, modular performance verification infrastructure Lead emulation-based performance setup and debug, enabling early performance validation Integrate performance regression, profiling, and analysis flows using industry-standard and custom tools Collaborate with compiler and OS teams to ensure software stack alignment with hardware performance goals AI-Driven Infrastructure Drive the development of AI/ML-based infrastructure to automate performance analysis, anomaly detection, and efficiency improvements Leverage data-driven techniques to optimize verification coverage and reduce debug cycles Cross-Functional Collaboration Partner with x86 architecture, RTL design, physical design, and software teams to ensure performance targets are met Influence design decisions through data-backed performance insights Stakeholder Management Align verification goals with business and product roadmaps Communicate performance status, risks, and trade-offs to executive leadership and stakeholders Industry Awareness Stay current with trends in CPU architecture, performance modeling, and verification technologies Evaluate and adopt emerging tools and techniques to maintain a competitive edge Preferred Experience 20+ years of industry experience with performance modeling and simulation tools (e g , cycle-accurate simulators, emulators) with strong background in CPU microarchitecture, performance analysis, and system-level performance verification Proven leadership in managing large, cross-functional engineering teams Familiarity with PMC DV, latency and throughput validation, emulation platforms, and performance debug flows Deep understanding of x86 ISA, microarchitecture, and performance metrics Experience in developing performance test suites, performance triage tools, and simulation/emulation infrastructure Expertise in performance analysis tools, correlation techniques, and workload optimization Strong analytical and problem-solving skills with a data-driven mindset Excellent communication and interpersonal skills Deep knowledge of modern out-of-order CPU cores, memory subsystems, and performance modeling is a plus Experience with ML/AI techniques/frameworks for performance triage, infrastructure automation and prediction is a plus Exposure to high-performance computing (HPC), virtualization, or server-class CPUs Background in hardware/software co-design and performance-aware compiler optimizations Familiarity with pre-silicon and post-silicon debug methodologies Academic Credentials Bachelors/Masters/Ph D in electrical engineering, Computer Engineering, or related field LOCATION: Bangalore AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services AMD and its subsidiaries are equal opportunity employers and will consider all applicants without regard to race, marital status, sex, age, color, religion, national origin, veteran status, disability or any other characteristic protected by law EOE/MFDV Benefits offered are described: AMD benefits at a glance AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law We encourage applications from all qualified candidates and will accommodate applicantsneeds under the respective laws throughout all stages of the recruitment and selection process

So, what’s the role all about? We are seeking a highly skilled Senior Performance Engineer to lead the performance validation of our complex enterprise software product . This software handles massive transaction loads , operates across multiple operating systems and databases , and is deployable both on-premises and in the cloud . The ideal candidate will have strong expertise in performance testing, including workload modeling, test planning, execution, analysis, and reporting, with a focus on ensuring scalability, responsiveness, and stability under varying load conditions. How will you make an impact? Performance Testing: Performance Testing and Analysis Design and execute performance benchmarking, load testing, and stress testing strategies. Conduct performance tests to evaluate system behaviour under different load conditions (e.g., load testing, stress testing, scalability testing). Analyse and interpret performance test results, identify bottlenecks, and recommend solutions. Develop performance test plans, test cases, and execution strategies. Track performance metrics and trends over time to ensure consistency and stability of systems. Performance Benchmarking Perform benchmarking activities to understand and measure system performance against industry standards and best practices. Application Monitoring Continuously monitor the performance of applications in cloud-based pre-production environments. Utilize application performance management (APM) tools (e.g., Jprofiler, Open-source tools, etc.) to detect and troubleshoot performance issues. Implement observability solutions, leveraging tools like Prometheus, Grafana, New Relic, Dynatrace, or Datadog for real-time performance monitoring. Troubleshooting and Issue Resolution Investigate and resolve performance-related issues across multiple platforms (web, backend services). Work with teams to implement effective root cause analysis for performance failures. Identify, diagnose, and optimize performance bottlenecks across the entire technology stack (application, database, infrastructure, and cloud environments) Automation and Scripting Develop automated scripts and frameworks for creating complex financial data, load, and performance testing. Leverage automation tools (e.g., JMeter, LoadRunner, Gatling) to run performance tests and gather metrics. Develop and maintain performance test suites using industry-standard tools (JMeter, Gatling, LoadRunner, etc.). Reporting and Documentation Create detailed reports with analysis, recommendations, and action plans for performance improvements. Maintain thorough documentation of performance tests, results, and optimization strategies. Have you got what it takes? Education: Bachelor’s or Master’s degree in Computer Science, Information Technology, Engineering, or a related field. Qualifications - Essential: 5-7 years of hands-on experience in performance engineering for enterprise-grade applications Hands-on experience with performance testing tools (e.g., Apache JMeter, LoadRunner, Gatling, NeoLoad or similar). Expertise in analysing CPU, memory, disk, and network performance in distributed systems. Basic understanding of profiling and tuning JVM-based applications (Java, Scala, Kotlin) or other modern runtime environments. Strong understanding of multi-threading, concurrency, and memory management . Familiarity with CI/CD pipelines and integrating performance testing into DevOps workflows. Excellent analytical and problem-solving skills with a deep understanding of system design. Qualifications - Preferred: Hands-on experience with database performance tuning (SQL query optimization, indexing, partitioning, caching, replication strategies). Experience with cloud-based performance optimization (AWS, Azure, or GCP) and containerized environments (Docker, Kubernetes). Experience with intelligent performance monitoring solutions Knowledge of event-driven architectures , Kafka , or messaging systems Previous experience optimizing serverless and microservices architectures Strong scripting skills in Python, Bash, Groovy or PowerShell for automation Familiarity with agile methodologies and DevOps practices Experience with infrastructure-as-code tools (e.g., Terraform, Ansible) Background in security performance testing In-depth knowledge of web technologies (HTTP, HTTPS, REST APIs) and application architectures What’s in it for you? Work on a high-impact, high-scale enterprise software product. Collaborate with top engineering talent in a dynamic, innovative environment. Competitive salary, benefits, and opportunities for career growth . If you are a performance-focused engineer who thrives in complex, high-scale environments, we’d love to hear from you! Enjoy NiCE-FLEX! At NiCE, we work according to the NiCE-FLEX hybrid model, which enables maximum flexibility: 2 days working from the office and 3 days of remote work, each week. Naturally, office days focus on face-to-face meetings, where teamwork and collaborative thinking generate innovation, new ideas, and a vibrant, interactive atmosphere. Requisition ID:6865 Reporting into: Tech Manager Role Type: Senior Performance Engineer

The role This position is a unique opportunity to exercise your hardware verification skills on cutting edge designs within the prestigious PowerVR Hardware Graphics group. Here you will exercise your skills on key components that meet latest demands and improvements for graphics IP. You will: Oversee all verification activities for a GPU component or subsystem, from initial planning to final sign-off. Develop verification plans and build, maintain UVM testbench components. Monitor, track, and report verification metrics to ensure closure. Provide verification-focused feedback during design specification discussions. Implement UVM testbenches, including writing tests, sequences, functional coverage, assertions, and verification plans. Take ownership of task definition, effort estimation, and progress tracking. Contribute to the enhancement and evolution of GPU verification methodologies. Lead, mentor, and support team members in verification activities. Engage in design and verification reviews, suggesting improvements where necessary. About you Committed to making your customers, stakeholders and colleagues successful, youre an excellent communicator, listener and collaborator who builds trusted partnerships by delivering what you say, when you say. Youre curious, solutions orientated and a world-class problem solver who constantly seeks opportunities to innovate and achieve the best possible outcome to the highest imaginable standard. You'll have: Demonstrated experience in developing verification environments for complex RTL designs. Strong understanding of constrained-random verification methodologies and the challenges of achieving verification closure. Ability to define verification requirements, determine implementation approaches, and design testbenches. Expertise in root-cause analysis of complex issues, with the ability to resolve them efficiently. Deep knowledge of SystemVerilog and UVM. Capability to develop and enhance verification flows. Familiarity with ASIC design methodologies, flows, and tools. Proficiency in planning, estimating, and tracking personal tasks. Experience managing multiple projects simultaneously. Strong communication skills for effectively conveying technical issues, both verbally and in writing. You might also have: Experience leading teams. Knowledge of Graphics, GPU, CPU, or SoC architectures. Experience with broader verification technologies, including formal property-based verification (FPV). Proficiency in coding and scripting using Python, TCL, Perl, SystemC, or C++. Understanding of functional safety standards such as ISO26262.

The role This position is a unique opportunity to exercise your hardware verification skills on cutting edge designs within the prestigious PowerVR Hardware Graphics group. Here you will exercise your skills on key components that meet latest demands and improvements for graphics IP. You will: Design verification plans and develop, maintain UVM testbench components. Gain a deep understanding of the design and testbench under your responsibility. Build UVM testbenches, including writing tests, sequences, checkers, scoreboards, and verification/coverage plans. Take ownership of task definition, effort estimation, and progress tracking. Contribute to the improvement and evolution of GPU verification methodologies. Take ownership of coverage closure and provide verification metric reports. About you Committed to making your customers, stakeholders and colleagues successful, youre an excellent communicator, listener and collaborator who builds trusted partnerships by delivering what you say, when you say. Youre curious, solutions orientated and a world-class problem solver who constantly seeks opportunities to innovate and achieve the best possible outcome to the highest imaginable standard. You'll have: Experience in developing and maintaining verification components. Strong proficiency in SystemVerilog, UVM, and constrained-random verification methodologies. Skilled in debugging and identifying root causes of issues. Effective communication of technical issues, both verbally and in writing. You might also have: Knowledge of Graphics, GPU, CPU, or SoC architectures. Experience with broader verification technologies, including formal property-based verification (FPV). Proficiency in coding and scripting using Python, TCL, Perl, SystemC, or C++.

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, we enable our customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, weve got quite a lot to offer. How about you Position Overview Siemens EDA is looking for a highly motivated Product Engineer to help define, promote, and deploy hardware assisted acceleration with Veloce emulation and prototyping solutions at leading edge semiconductor and systems customers. As a hardware-assisted verification solutions expert you will be part of the world-wide Veloce experts team working with emulation and prototyping solutions for pre and post silicon validation, verification and software bring-up of industrys most complex SoC and FPGA designs using the latest advances in co-emulation technologies with Veloce Transactor Layer (VTL) transactors and testbenches. Key responsibilities Assist applications engineers (AEs) and customers with integration and debug of verification solutions to enable Testbench acceleration in a hardware-assisted verification environment Support PCIe, AMBA-based, UART, and serial protocol (SPI, I2C, ") transactors targeting emulation and prototype platforms. Build or support example designs for solutions that use SystemC or UVM transactors. Drive Veloce technology at various customers using hands-on technical expertise. Requires working directly with customers to ensure technical results are met. Promote technical customer service to build and improve customer relationships, ensuring long term customer happiness. Work closely with the sales team in a focused strategy to expand our business. Provide feedback and product ideas to our solutions product development teams. Troubleshoot and remove technical obstacles. Work very closely with all team member to ensure full customer happiness. Develop and deliver technical presentations/trainings on new features and product updates. Communicate customers' technical requirements to product marketing. Develop a network of technical relationships at a peer-to-peer level with our customers. Use complex design and tooling tasks involving multiple design environments. Cogently communicate software problems to product development. Assists other specialists in the design, development, and implementation of large-scale solutions on multiple software products and hardware platforms. Provides business and technical feedback to software and hardware vendors. Use advanced data exchange methodologies to facilitate effective data sharing between dissimilar systems or applications that span across engineering disciplines. Responsible for in-depth technical papers and presentations to customer management or at technical conferences. Guide junior engineers. Work with minimal direction on complex projects with latitude for independent judgment and discretion. Well skilled with broad proficiency. Required Qualifications We seek a graduate (Bachelor's) with 5+ years of related experience or post graduate (Master's) with 3+ years of proven track record. Familiarity with Verilog/SystemVerilog or SystemC and UVM Must have experience with emulation of large scale CPU, GPU or Systems-on-Chip (MPSoC) designs, emulation technologies, usages and industry approaches. Prior experience in a customer facing function such as application engineer from an emulation or prototype systems provider a plus! We've got a lot to offer, how about you A collection of over 377,000 minds building the future, one day at a time in over 200 countries. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! #LI-EDA #LI-HYBRID

Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. . Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of complete processor pipeline stages. Good understanding of computer architecture, including Processor core design specifications,processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units Experience with high frequency, instruction pipeline designs. At least 1 generation of Processor Core silicon bring up experience. In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages.. Preferred technical and professional experience Knowledge of verification principles and coverage. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.