143 Cpu Jobs - Page 2

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Software Engineer, you will design, develop, create, modify, and validate embedded and cloud edge software, applications, and/or specialized utility programs that launch cutting-edge, world class products that meet and exceed customer needs. Qualcomm Software Engineers collaborate with systems, hardware, architecture, test engineers, and other teams to design system-level software solutions and obtain information on performance requirements and interfaces. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc. Preferred Qualifications: Job description: Design, develop, test and support real-time operating system (RTOS) features for Qualcomm Hexagon Processors. As a Core Platform Kernel software engineer, you will be part of a team of software engineers who are passionate about kernel level programming with keen attention to write high performance code for resource-constrained processors. The Qualcomm Real Time Operating System (QuRT) is the OS that powers Qualcomm Hexagon Processors. We are continually enhancing the OS to support new Hexagon processor features, enhance power savings features, enhance security, creating Safety profile. and provide new OS functionality to meet the demands of our customers Principal Duties and Responsibilities: Skills/experience: 3-5 years of Software Engineering or related work experience; Strong analytical, mathematical and debugging skills 3-5 years experience with Programming Language such as C, Python; pointers, data structures (e.g. linked list, trees, sorting) 3+ years experience working with Assembly language. 3+ years experience working on software for DSP or CPU processors; Hardware and architectural knowledge / experience (Processor Architecture, Cache, interrupts, Memory barriers, Strong ordering, etc.) 3+ years experience using Emulator, simulator environment, LLDB/JTAG debuggers / profilers 3+ years experience working on real time operating systems for embedded systems; Thorough RTOS knowledge and experience (Mutex, spinlocks, Queues, Signaling, Events, Deferred function calls & Callbacks, Multi-thread & Multi-process environments, Concurrency Scenarios, etc.) Develop code to run under an RTOS, and how to use semaphores, mutexes, queues, IPC. Develop and debug code with stacks, queues, linked-lists, and other common data structures. Responsibilities: DSP RTOS development, LLDB/Debugger development, Safe RTOS development Level of Responsibility: Works under supervision. Decision-making may affect work beyond immediate work group. Requires verbal and written communication skills to convey information. May require basic negotiation, influence, tact, etc. Tasks do not have defined steps; planning, problem-solving, and prioritization must occur to complete the tasks effectively.

Job Details: Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products. Qualifications: Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: Bachelor's degree in electrical engineering or computer engineering with 4 to 9 years of experience or a master's degree in electrical engineering or computer engineering. 3+ years of experience in 5 or more of the following: Test Bench bring-up at SoC and strong programming skills in System Verilog, OVM and UVM. Test Plan development experience. Enabling regressions, maintaining QoV (quality of validation) with good functional/code/other coverage metrics. Familiarity with both simulation and emulation environments. Strong CPU/GPU architecture understanding. RTL Debugging module level or soc level system simulation failures. Building emulation models, enabling content Monitoring and improve existing simulation environments and simulation efficiency. Experience with Debugging and ACM domain will be a plus. Job TypeExperienced Hire ShiftShift 1 (India) Primary Location India, Bangalore Additional Locations Business groupThe Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. *

Project Role : Application Support Engineer Project Role Description : Act as software detectives, provide a dynamic service identifying and solving issues within multiple components of critical business systems. Must have skills : Oracle Database Administration (DBA) Good to have skills : Oracle Exadata Database MachineMinimum 3 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As an Application Support Engineer, you will act as software detectives, providing a dynamic service identifying and solving issues within multiple components of critical business systems. Your day will involve troubleshooting and resolving software-related issues to ensure seamless operations. Roles & Responsibilities:- Expected to perform independently and become an SME.- Required active participation/contribution in team discussions.- Contribute in providing solutions to work related problems.- Proactively identify and resolve software-related issues.- Collaborate with cross-functional teams to troubleshoot and resolve system problems.- Develop and implement solutions to enhance system performance.- Provide technical support and guidance to end-users.- Document troubleshooting steps and solutions for future reference."1. Experience in shell scripting to automate repetitive tasks.2. Provides the best services possible, yearns for the best outcome, is curious and takes ownership. 3. Able to plan and execute tasks.4. Pro-active in reporting and identifying issues.""1. Oracle database administration At least 5 years 11g, 12c and some experience with 19c. And at least 1 year experience on ZFS/ ZDLRA configuration, integration, patching and support as specified with Exadata.2. Experience oracle database installation and database upgrades. Preferably from 12c to 19c. 3. Sound knowledge of Real Application Cluster and ASM.4. Troubleshooting skills for any issues, Ability to view and interpret relevant logs and provide a reasonable analysis.5. Reorganization of tables, indexes on being fragmented. Performing housekeeping tasks as required purging old files & Unwanted Tables from the Oracle db.6. Incident management, troubleshooting and resolving user requests and problems.7. Familiarity with Oracle CPU and PSU patching procedure.8. Working on standby database creation and their recovery and DR Drill activities.9. Familiarity with tuning utilities and reports For example, AWR, ASH, ADDM, SQLT, SQL Tuning Advisor.10. Familiarity with working on OEM to montior DB and also perform various administration tasks.11. Work with customer service including both internal and external teams in identifying and solving reported field issues" Professional & Technical Skills: - Must To Have Skills: Proficiency in Oracle Database Administration (DBA).- Good To Have Skills: Experience with Oracle Exadata Database Machine.- Strong understanding of database management principles.- Proficient in SQL and PL/SQL scripting.- Experience in performance tuning and optimization of databases.- Knowledge of backup and recovery procedures. "1.Oracle database administration 12c, 19c or higher2.Exadata administration""1. Contribute to coordination and planning of Application / Infrastructure related activities / outages2. ITIL knowledge and experience in Incident management - Actively monitor service now queues and ensure no ticket/incident is left unattended" Additional Information:- The candidate should have a minimum of 3 years of experience in Oracle Database Administration (DBA).- This position is based at our Pune office.- A 15 years full time education is required. Bachelors of Engineering Qualification 15 years full time education

Role & Responsibilities : As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Lead the development of the verification plans, environment, testbenches and writing testcases to verify Cache structures & protocols in processor. Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Work with development team to ensure coverage criteria is met. . Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Required Professional and Technical Expertise : 9 + years of experience in Functional Verification of processors or ASICs. 3+ years of experience in the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor Cache (L2/L3) Coherency, Memory Hierarchy Verification Minimum one full life cycle leadership experience of a processor/SoC verification flow with focus on Cache Coherency Verification Developed test-plans and test strategies for IP/unit/block level verification of Cache Coherency structures in processor/SoC Good object-oriented programming skills in C++/SV, scripting languages like Python/Perl. Knowledge of functional verification methodology like UVM/OVM Knowledge of HDLs (VHDL/Verilog) Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenarios, debugging and triaging fails Experience in driving verification coverage closure. Preferred technical and professional experience Additional skill Stress testing and ability to identify corner case scenarios.

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic unit. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the core level pre-silicon functional & performance verification for our next -generation IBM POWER processor core systems offering. Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Work mode : Hybrid Major Skills and Experience Strong experience with AUTOSAR architecture, Configuration & implementation Must have BSW software development experience in configuration of Communi Solid Hands-on experience in full lifecylec AUTOSAR compliant ETAS ISOLAR Strong expertise in Programming (C/C++) and debugging for embedded multithreaded and multi core/CPU software environment, experienced in EB Tresos, Polyspace, JIRA, IBM Polarion, Plastic SCM, VectorCast, Lauterbach T32 on Infineon AURIX TriCore 389Educational Qualifications: B.E/B.Tech/M.E/M.Tech in Electronics / Communication / Electrical / Power Elec

Position #1: Lead/Senior Design Verification Engineer - CPU / RISC-V Location : Bangalore Experience : 612 Years Domain : Semiconductors | SoC | RISC-V | CPU Subsystems Role Overview: We are seeking an experienced Design Verification (DV) Engineer to join our core CPU verification team focused on RISC-V based processors and subsystems . This is a hands-on role requiring strong technical knowledge in processor architecture , microarchitecture verification , and end-to-end validation of complex SoCs. Key Responsibilities: Develop and execute test plans and environments for CPU and RISC-V based subsystems. Build UVM-based verification environments for simulation and regression. Create testbenches, assertions, checkers, and functional coverage models. Debug failures using waveform viewers, logs, and deep architectural understanding. Collaborate with architects, designers, and firmware teams across all verification phases. Required Skills: 612 years of hands-on DV experience, primarily on CPU cores or RISC-V . Strong understanding of RISC-V or ARM microarchitectures . Proficient in SystemVerilog, UVM , and scripting (Python/Perl/Tcl). Experience with cache coherency, MMUs, branch prediction, or pipeline logic is a plus. Exposure to verification tools like VCS, Questa, or Xcelium . Position #2: Lead/Senior Design Verification Engineer - High-Speed PCIe Location : Bangalore Experience : 612 Years Domain : Semiconductors | SoC | High-Speed Interfaces | PCIe Gen4/Gen5 Role Overview: We are looking for a skilled Design Verification Engineer with expertise in high-speed interface protocols , particularly PCI Express (PCIe) . The role will focus on validating complex SerDes-based subsystems and ensuring full compliance and performance coverage. Key Responsibilities: Define and implement UVM-based testbenches for PCIe-based subsystems. Verify protocol-level compliance (PCIe Gen4/Gen5/Gen6). Generate, run, and debug simulations across various protocol scenarios and stress conditions. Ensure full coverage functional, code, and assertion-based . Collaborate with silicon validation and firmware teams for end-to-end test alignment. Required Skills: 612 years of DV experience with PCIe (mandatory) and high-speed interface protocols. Strong command of UVM, SystemVerilog , and assertion-based verification. Deep understanding of PCIe layers , packet formats, credit flow, and link training. Experience with VIPs (Synopsys/Cadence/Mentor) and waveform debugging tools. Knowledge of AXI/AMBA , DDR, or USB is a strong plus. Interested? Apply or or know someone great? Reach out via DM or WhatsApp +91 9966034636 / Send your profile to ranjith.allam@cyient.com

Job Information Job Opening ID ZR_2085_JOB Date Opened 12/12/2023 Industry Technology Job Type Work Experience 8-10 years Job Title Autosar BSW City Bangalore North Province Karnataka Country India Postal Code 560002 Number of Positions 3 Work modeHybrid Major Skills and Experience Strong experience with AUTOSAR architecture, Configuration & implementation Must have BSW software development experience in configuration of Communi Solid Hands-on experience in full lifecylec AUTOSAR compliant ETAS ISOLAR Strong expertise in Programming (C/C++) and debugging for embedded multithreaded and multi core/CPU software environment, experienced in EB Tresos, Polyspace, JIRA, IBM Polarion, Plastic SCM, VectorCast, Lauterbach T32 on Infineon AURIX TriCore 389Educational Qualifications: B.E/B.Tech/M.E/M.Tech in Electronics / Communication / Electrical / Power Elec check(event) ; career-website-detail-template-2 => apply(record.id,meta)" mousedown="lyte-button => check(event)" final-style="background-color:#2B39C2;border-color:#2B39C2;color:white;" final-class="lyte-button lyteBackgroundColorBtn lyteSuccess" lyte-rendered=""> I'm interested

Responsibilities Core Skills: Performance Testing and Engineering: Load testing tools (JMeter, Load Runner, etc.), APM and Logging (Grafana, Sumo Logic, New Relic, etc.), Cloud infrastructure and monitoring (AWS, CloudWatch, etc.) Essential Job Functions Lead the performance testing program, collaborating closely with agile teams and architects to build and maintain framework(s) to benchmark application performance across all layers of the application stack Apply advanced performance testing methodologies and best practices. Help setup production performance analysis framework and build-out strategies to load test the system Analyze test results, configure analysis graphs, and compile comprehensive performance test reports. Diagnose root causes of performance issues and implement optimization solutions to enhance application performance. Qualifications Qualifications Minimum of 10 years of experience in performance testing, preferably in a high-transaction SaaS environment, with proficiency in tools such as JMeter or Load Runner. Expertise in handling HTTP/HTML, web services, and asynchronous calls. Good-to-great understanding of memory and CPU utilization, throughput, latency, etc. Experience with monitoring and analysis tools like New Relic, Grafana, Sumo Logic, and AppDynamics. Experience with profiling and heap analysis tools Proficiency in at least one programming language. Experience with databases including MS SQL Server and MySQL Familiarity with AWS a plus Self-motivated, able to learn and research issues independently with a keen eye to details Must be passionate about wanting to make the software performance better i.e. “wont-quit-till-I-figure-out-the-root-cause mentality” Good analytical and problem-solving skills combined with technical writing and communication skills Familiarity with Agile/SCRUM SDLC strongly preferred

Role & responsibilities I am looking for candidates with scripting/ programming knowledge and not manual QA. Pls refer the key skills and profile must match that. 4-7 years of relevant experience KEY RESPONSIBILITIES: Support weekly / bi-weekly manual QA testing of Windows Drivers (GFX, MM, NPU etc) Draft test automation scripts for Graphics, MM, NPU drivers (Pytest, python) Proactively raise impediments and risk to IDC QA Lead. Customer focus and commitment to task assigned. KEY SKILLS: Post silicon validation one or more of the following domains, CPU, Graphics, memory, security, multimedia, PCIe, ACPI, NPU Hardware board bring up and debugging. Scripting and Programming (Python, Perl, etc.) Automation framework: Pytest or Robot Debug and triaging in system software and hardware environments. Manual test execution

Lead the unit level pre-silicon functional & performance verification the Load Store Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for LSU, including the Load and Store pipelines, D-Cache, Address translation, out of order execution of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Who We Are Applied Materials is the global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service cutting-edge equipment that helps our customers manufacture display and semiconductor chips- the brains of devices we use every day. As the foundation of the global electronics industry, Applied enables the exciting technologies that literally connect our world- like AI and IoT. If you want to work beyond the cutting-edge, continuously pushing the boundaries of"science and engineering to make possible"the next generations of technology, join us to Make Possible® a Better Future. What We Offer Location: Bangalore,IND At Applied, we prioritize the well-being of you and your family and encourage you to bring your best self to work. Your happiness, health, and resiliency are at the core of our benefits and wellness programs. Our robust total rewards package makes it easier to take care of your whole self and your whole family. Were committed to providing programs and support that encourage personal and professional growth and care for you at work, at home, or wherever you may go. Learn more about our benefits . Youll also benefit from a supportive work culture that encourages you to learn, develop and grow your career as you take on challenges and drive innovative solutions for our customers."We empower our team to push the boundaries of what is possible"”while learning every day in a supportive leading global company. Visit our Careers website to learn more about careers at Applied. Who We Are Applied Materials is the global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service cutting-edge equipment that helps our customers manufacture display and semiconductor chips- the brains of devices we use every day. As the foundation of the global electronics industry, Applied enables the exciting technologies that literally connect our world- like AI and IoT. If you want to work beyond the cutting-edge, continuously pushing the boundaries of"science and engineering to make possible"the next generations of technology, join us to Make Possible ® a Better Future. At Applied, we prioritize your well-being and encourage you to bring your best self to work. Your happiness, health, and resiliency are at the core of our benefits and wellness programs. Our robust total rewards package makes it easier to take care of your whole self and your whole family. Were committed to providing programs and support that encourage personal and professional growth and care for you at work, at home, or wherever you may go. Applied Materials Applied AI Systems Solutions (System to Materials) Business Unit is searching for a Software Engineer- AI Performance Architect to join our team! The Applied AI System to Materials team works on architecting differentiated AI Systems leveraging Applieds fundamental innovations. Write the details of role here Benchmark AI workloads (LLMs) in single and multi-node High Performance GPU configurations. Project and Analyze systems performance for LLMs using various parallelization techniques. Develop methodologies to measure key performance metrics and understand bottlenecks to improve efficiency. Understanding of transformer-based model architectures and basic GEMM operations. Strong programming skills in Python, C/C++. Proficiency in systems (CPU, GPU, Memory, or Network) architecture analysis and performance modelling. Experience with parallel computing architectures, interconnect fabrics and AI workloads (Finetuning/Inference). Experience with DL Frameworks (Pytorch, Tensorflow), Profiling tools (Nsight Systems, Nsight Compute, Rocprof), Containerized Environment (Docker) "‹ Applied Materials is committed to diversity in its workforce including Equal Employment Opportunity for Minorities, Females, Protected Veterans and Individuals with Disabilities. Additional Information Time Type: Full time Employee Type: Assignee / Regular Travel: Not Specified Relocation Eligible: Yes Applied Materials is an Equal Opportunity Employer. Qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, ancestry, religion, creed, sex, sexual orientation, gender identity, age, disability, veteran or military status, or any other basis prohibited by law.

As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Develop the verification environment and test bench and creating testcases. Debug fails using waveform, trace tools and debug RTL code Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 5 + years of experience in Functional Verification of Processors or ASICs. Minimum 3+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Multi-processor cache coherency, Memory subsystem, IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc Knowledge of functional verification methodology - UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Good object-oriented programming skills in C/C++, and any of scripting languages like Python/Perl Development experience on Linux/Unix environments and in GIT repositories and basic understanding of Continues Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in verification coverage closure Preferred technical and professional experience Verify the different functions/components in a PCI Express Controller & high speed SERDES (PHY). Scripting Expertise backed up relevant experience in the same Writing Verification test plans Functional and code coverage analysis and debug Formal verification experience

Lead the core level pre-silicon functional & performance verification for our next -generation IBM POWER processor core systems offering. Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the unit level pre-silicon functional & performance verification the Instruction Sequencing Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for ISU which covers the Issue queues, Register Renaming for Out of Order Execution, Issue instructions to Execution Pipelines, Reordering Buffers for completion of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of Instruction Dispatch verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing Issue Queues, Register renaming and forwarding, Reordering Buffer and Pipeline flush/exception handling etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic unit. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic unit. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

locationsIndia, Bangalore time typeFull time posted onPosted 30+ Days Ago job requisition idJR0270511 Job Details: About The Role : Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products. Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum (must haves) Bachelor's degree in electrical engineering or computer engineering with 3 to 9 years of experience or a master's degree in electrical engineering or computer engineering. 6+ years of experience in 5 or more of the following: Test Bench bring-up at SoC and strong programming skills in System Verilog, OVM and UVM. Test Plan development experience. Enabling regressions, maintaining QoV (quality of validation) with good functional/code/other coverage metrics. Familiarity with both simulation and emulation environments. Strong CPU/GPU architecture understanding. RTL Debugging module level or soc level system simulation failures. Building emulation models, enabling content Working with Validation Engineers and central CAD teams to support and maintain verification requirements in terms of Automation and tool flow support. Coordinating with Val team on CAD Requirement with support CAD, IT and Engineering Compute Teams. Act as focal point between design and tool vendors for issues and feature enhancements. Training/Supporting Validation Engineers in CAD tool flow and Infrastructure Monitoring and improve existing simulation environments and simulation efficiency. Experience with Performance Validation of GPUs and automation framework using Python is desirable Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. *

Desired Candidate Profile 6-11 years of experience in Firmware Development with expertise in Bare Metal Embedded development. Bachelor's degree in Any Specialization (B.Tech/B.E.). Strong understanding of Kernel programming concepts. Troubleshooting and analytical experience Good Communication (Verbal and Written) skills Proactively create experiments and tooling to detect and diagnose hardware/firmware/software health issues BMTC Core Developers C/C++ coding skills with Embedded SW/FW Embedded CPU Architecture (CPU Pipeline, Cache hierarchy, peripherals etc) Experienced in HW/SW trade-offs Experienced in debugging at CPU and SOC level Familiar with Kernel/Driver coding Understands multi-threading, queues, user space and kernel space Experienced in HW/SW trade-offs Experienced in debugging at device drivers Experienced in memory management.

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: Qualcomm's Open source Engineering team works with internal and external groups to manage their use of open source and third party software. Participation in the analysis of large and complex software code bases and report detected third-party and open source components and their licenses. This role is focused entirely on supporting open source software development, finding the true origin and license terms of detected third party code. This position requires quick handling of urgent requests and requires quick turnaround. Responsibilities -Reviewing code to ensure it adheres to the legal guidelines - Scanning and analyzing code and linkage between modules - Work closely with developers to create documentation pertaining to the code under review - Work closely with various legal departments - Contribute to automation development. This position will also help with automation projects that may involve script development, tool development and will work productively with no supervision. At this level, assignments are less well defined. Independence in performing assignments is required. Tasks may include: Analyze and document a significant high-level design based on incomplete or changing specifications Defining processes with leads and other stakeholders. Identifying appropriate simulations or analysis for providing input to system design trade-offs Partnering with multiple technical teams to define resolution paths Efficiently schedule time and resources needed to complete assigned tasks Candidate Qualifications 2+ years experience with python, C/C++, programming. Automation skills (Python, Shell scripting, database prototyping, web interfaces, etc...) Strong understanding of software development and engineering fundamentals Strong understanding of source control, packaging, and build system knowledge Strong Technical understanding of Linux Operating Systems Strong understanding of build process- compiler, assembler, linker Strong understanding of computing, CPU, Memory, operating system function and applications. Intermediate Embedded Software knowledge Understanding of GIT source control a plus Good understanding of Open Source Licensing a plus Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Software Applications Engineering General Summary: Profile, analyze the traces and optimize the performance of complex concurrent applications running on OSes such as QNX, Linux and Android running Natively as well as in virtual environments on Qualcomm Automotive platforms. Understand the customer use-cases and profile them on Auto platforms by working with multiple HW & SW teams.Understand key benchmark target based on Chipset configuration and correlation with measurement number.Analyze Performance KPIs of Automotive use-cases such as Booting, Multimedia (Camera, Display, Video playback), ADAS (Front and Surround camera perception, Driver Monitoring, Parking stack), Maps & Navigation, Rear-seat entertainment etc. Correlate performance with projections from the systems team. Optimize the booting KPI to meet customer needs.Profile/analysis the popular benchmarks KPI of CPU/GPU/DDR/IO,etc.Characterize/Analysis the hypervisor performance.OS performance comparison and gap debugging.Maintain & publish a performance dashboard across all critical use-cases.Work with customers to root-cause performance issues and lead deep-dive debugs of customer use-cases.Collaborate with cross-functional global teams to plan, execute performance activities on Auto chipsets.Writing or enhance debugging tools for easy debugging/profiling performance issues. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Applications Engineering, Software Development experience, or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Applications Engineering, Software Development experience, or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. 1+ year of any combination of academic and/or work experience with Programming Language such as C, C++, Java, Python, etc. 1+ year of any combination of academic and/or work experience with debugging techniques. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Lead the core level pre-silicon functional & performance verification for our next -generation IBM POWER processor core systems offering. Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of complete processor pipeline stages. Good understanding of computer architecture, including Processor core design specifications,processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units Experience with high frequency, instruction pipeline designs. At least 1 generation of Processor Core silicon bring up experience. In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of verification principles and coverage. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 6 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg.I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages.

We are looking for a highly skilled Python Backend Developer with a minimum of 4+ years of experience. The candidate will develop and scale platforms to run real-time computer vision models, productionize machine learning models with API designs, and deploy models using Django or any UI. This role requires expertise in Python, Kubernetes, Docker, cloud platforms (Azure, GCP, or AWS), CI/CD, and RESTful APIs. The ideal candidate should have experience building and maintaining ML systems, working with GPU/CPU usage, and performing load, unit, and regression testing. Proficiency in FastAPI, strong communication skills, and the ability to adapt to fast-changing environments are essential.