ASIC RTL Design Engineer (Display) - Sr Lead

As an RTL Design/Hardware Engineer at Qualcomm India Private Limited, your role involves designing and leading all Front-end design activities for the Display Sub-system. Your responsibilities will include: - Performing RTL design, simulation, synthesis, timing analysis, lint check, clock domain crossing check, conformal low power check, and formal verification for IP blocks. - Working closely with the technology/circuit design team to close IP block specification/requirement. - Collaborating with the verification/physical design team to complete the IP design implementation. - Supporting the SoC team to integrate the Display Sub-system IP solution into various SoC chips and front-end design flows. - Enabling the low power feature in wireless SoC product by working closely with the system/software/test team. - Evaluating new low-power technologies and analyzing their applications to address requirements. - Understanding and performing block & chip-level performance analysis, identifying performance bottlenecks, and providing required solutions. Qualifications required for this role are: - Bachelor's degree / master's degree in Electronics & Tele Engineering, Microelectronics, Computer Science, or a related field. - 4+ years of RTL Design/Hardware Engineering experience or related work experience. - Strong domain knowledge on RTL Design, implementation, and integration. - Experience with RTL coding using Verilog/VHDL/System Verilog. - Experience in micro-architecture & designing cores and ASICs. - Familiarity with Synthesis, Formal Verification, Linting, CDC, Low Power, UPFs, etc. - Exposure in scripting (Pearl/Python/TCL). - Strong debugging capabilities at simulation, emulation, and Silicon environments. - Good team player with the ability to interact with other teams/verification engineers proactively.,