11 Asic Methodology Jobs

**Job Description:** **Role Overview:** You will be part of a team that is dedicated to pushing boundaries and developing custom silicon solutions for Google's direct-to-consumer products. Your contribution will play a crucial role in shaping the next generation of hardware experiences, ensuring unparalleled performance, efficiency, and integration for products loved by millions worldwide. **Key Responsibilities:** - Lead a team in delivering fabric interconnect design. - Develop and refine RTL design to meet power, performance, area, and timing goals. - Define details such as interface protocol, block diagram, data flow, and pipelines. - Oversee RTL development and debug functional/performa...

You will be a part of a team that focuses on developing custom silicon solutions for Google's direct-to-consumer products, contributing to the innovation behind widely loved products worldwide. Your role will involve designing foundation and chassis IPs for Pixel System on a Chip (SoCs) and collaborating with various teams to deliver high-quality Register-Transfer Level (RTL) designs. As a key member of the team, you will solve technical challenges related to micro-architecture, low power design, and evaluate design options considering performance, power, and area constraints. - Work collaboratively with the team to deliver coherent fabric interconnect solutions. - Define microarchitecture d...

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 3 years of experience with Register-Transfer Level (RTL) design and integration using Verilog/System Verilog, microarchitecture and automation. 3 years of experience with the Register-Transfer Level quality check tool flows (e.g., Lint, Clock Domain Crossing, Reset Domain Crossing, Synthesis). Preferred qualifications: Experience with methodologies for Register-Transfer Level (RTL) quality checks (e.g., Lint, CDC, RDC). Experience with IP integration methodology, IP Design, ARM-based SoCs, ARM-protocols and ASIC methodology. Expe...

Role Overview: As a Senior ASIC RTL Design Engineer at Google, you will be a key member of a team dedicated to creating custom silicon solutions for Google's direct-to-consumer products. Your role will involve pushing boundaries and contributing to the innovation that drives products loved by millions globally. Your expertise will play a crucial part in shaping the future of hardware experiences, ensuring unparalleled performance, efficiency, and integration. Responsibilities: - Lead a team to deliver fabric interconnect design for ASICs. - Develop and enhance RTL design to meet power, performance, area, and timing objectives. - Define key details such as interface protocols, block diagrams,...

As a member of our team, you will play a key role in developing custom silicon solutions that drive the future of Google's direct-to-consumer products. You will be at the forefront of innovation, contributing to products that are cherished by millions globally. Your expertise will be instrumental in shaping the next wave of hardware experiences, delivering exceptional performance, efficiency, and integration. In your role within the platform IP team, you will be involved in designing foundation and chassis IPs for Pixel SoCs, including components such as NoC, Clock, Debug, IPC, MMU, and other peripherals. Collaboration with cross-functional teams such as architecture, software, verification,...

As a skilled professional with a Bachelor's degree in Electrical or Computer Engineering or equivalent practical experience, along with 6 years of expertise in ARM-based System on a chip (SoCs), interconnects, and Application-Specific Integrated Circuit (ASIC) methodology, you are well-equipped to take on the responsibilities of this role. Additionally, your 5 years of experience in Register-Transfer Level (RTL) design using Verilog/System Verilog and microarchitecture, coupled with your proficiency in a coding language like Python or Perl, make you an ideal candidate for this position. Ideally, you hold a Master's degree or a PhD in Electrical Engineering, Computer Science, or possess equiv...

As a member of the team at this organization, you will play a crucial role in the development of custom silicon solutions that will drive the future of Google's direct-to-consumer products. Your contributions will be instrumental in the innovation process that leads to the creation of products that are beloved by millions around the globe. Your expertise will be key in shaping the next generation of hardware experiences, ensuring exceptional performance, efficiency, and integration. With a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience, and a minimum of 3 years of experience in Register-Transfer Leve...

As a Senior ASIC RTL Design Engineer at Google, you will play a crucial role in shaping the future of custom silicon solutions that drive Google's direct-to-consumer products. Your expertise in RTL design will be instrumental in delivering innovative hardware experiences with superior performance, efficiency, and integration. With a Bachelor's degree in Electrical Engineering or Computer Engineering, or equivalent practical experience, and a minimum of 15 years of experience in ASIC RTL design, you are well-equipped to excel in this role. Your proficiency in Verilog/System Verilog and microarchitecture will be essential in contributing to the development of ARM-based SoCs, interconnects, and...

As a candidate for this role, you should hold a Bachelor's degree in Electrical/Computer Engineering or possess equivalent practical experience. You should also have at least 2 years of experience working with RTL design using Verilog/System Verilog and microarchitecture, particularly in the realm of ARM-based SoCs, interconnects, and ASIC methodology. A Master's degree in Electrical/Computer Engineering would be considered a preferred qualification for this position. Additionally, experience with methodologies for RTL quality checks (such as Lint, CDC, RDC) and low power estimation, timing closure, and synthesis would be beneficial. Join a dynamic team that is dedicated to pushing boundarie...

As a Senior ASIC RTL Design Engineer at Google, you will be a key member of a team dedicated to creating custom silicon solutions for Google's direct-to-consumer products. Your role will involve pushing boundaries and contributing to the innovation that drives products loved by millions globally. Your expertise will play a crucial part in shaping the future of hardware experiences, ensuring unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. As part of the Devices & Services team, you will have the opportunity to combine the best of Google AI, Software, and Hardware to create innovative ...

Create and support innovative Design Methodologies by leveraging feedback from our EDA and Digital IP teams. Integrate Methodologies into the development infrastructures of the Digital IP teams and demonstrate successful results. Support and maintain our regression infrastructure to manage changes and revise methodologies regularly. Test a range of Digital IPs through our Methodologies centered around Synopsys EDA tools. Collaborate with various teams to improve methodologies, enhancing both team and customer experiences. Develop and manage infrastructures, processes, methodologies, and checklists for the SG Digital IP Controllers. The Impact You Will Have: Enhance the efficiency and effecti...