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Cisco
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ASIC Design and Verification Engineer

ASIC Design and Verification Engineer

Cisco

4 - 7 years

4 - 7 Lacs

Bengaluru Karnataka India

Posted:1 month ago| Platform: Foundit logo

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Skills Required

ASIC Design

Work Mode

On-site

Job Type

Full Time

Job Description

Develop high-performance designs/ASICs from specification to tape-out
Define architecture/micro-architecture and write specifications
Implement complex RTL designs to meet timing and performance requirements
Define, evolve, and support design methodology
Mentor junior engineers and colleagues
Collaborate with verification, PD, DFT, package, and software teams
Perform diagnostic and post-silicon validation tests in the lab
Work with hardware and software teams to triage and root cause failures
Participate in design and code reviews
Scope third-party IP requirements and solicit vendors
Analyze code coverage and provide feedback for coverage closure
Perform lint and CDC checks
Build timing constraints for synthesis and STA
Work closely with the physical design team to resolve design timing and place-and-route issues

ASIC verification role

Develop test plans, cover points, and qualification tests
Perform end-to-end verification of design blocks and top-level
Build and maintain block, cluster, and top-level DV environment infrastructure
Construct testbenches components like scoreboard, agents, sequencers, and monitors
Write tests, debug regressions, and drive to module verification closure
Collaborate with designers and verification engineers for cross-block verification
Upgrade configuration/reset sequences (APIs)
Develop environment and tests for emulation
Ensure complete verification coverage through code, functional coverage, and gate-level simulations
Support post-silicon bring-up and optimize integration and performance

Minimum Qualifications

Proficient in Verilog
Have extensive experience in ASIC front-end design
Strong experience with synthesis, timing analysis and power analysis
Perl/Python/Makefiles scripting is strongly preferred
Experience designing ASICs for networking protocols (Ethernet, FC) is a plus
Must be strong at documenting the design specifications, verification plan and presentations
Strong problem-solving and ASIC debugging skills
Ability to debug system-wide issues
MSEE with 2+ or BSEE with 4+ years of related experience

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