Posted:1 day ago|
Platform:
Work from Office
Full Time
Dear Candidate's, find the below Details & JD
Location: Hyderabad
NP: Immediate-15 Days
Experience: 3-5 Years(02 Positions)
5-7 Years(01 Position)
interview: 03 Rounds
Good understanding of digital / mixed signal circuits and experience in Digital /Mixed signal Verification. Understand the usage of tools like Virtuoso, Xcellium, Simvision, vsim, Waveview, Finseim, Hspice.
• Hands on experience in writing Verilog, Real Number Models is a plus. • Hands on experience in building SV testbenches at Block and Fullchip Level. • Hands on experience in SV, UVM based Verification. Good scripting skills using perl, python is a plus. • Previous work experience in DRAM memory related fields is a plus. Must possess good communication, debugging skills and ability to work well in a team.
Primary Skills:
1. SV, UVM based Verification. Good scripting skills using perl, python is a plus.
2. Hands on experience in building SV testbenches at Block and Fullchip Level 3. Understand the usage of tools like Cadence( Xcellium, Simvision), Synopsys (VCS, Verdi) and Mentor (Questasim) simulators .
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