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Qualcomm
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Wireless R&D IP Verification Lead Engineer, Senior

Wireless R&D IP Verification Lead Engineer, Senior

Qualcomm

3 - 8 years

17 - 22 Lacs

bengaluru

Posted:20 hours ago| Platform:

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Skills Required

wireless python hardware engineering communication and interpersonal skills ips uvm mechanical systems scripting r automation gate level simulation bluetooth debugging perl electronics engineering digital transformation architecture

Work Mode

Work from Office

Job Type

Full Time

Job Description

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what''s possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

Bachelor''s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORMaster''s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Location: Bangalore

Key Responsibilities

Contribute to flagship Wireless IP development covering WAN, WLAN, GNSS, and Bluetooth technologies.
Own end-to-end IP-level verification, including:
- Design analysis and verification planning.
- Developing test benches and writing test cases using SystemVerilog/UVM .
- Writing assertions, running simulations, and achieving coverage goals.
Explore and implement advanced DV methodologies (formal, simulation) to improve efficiency and quality.
Debug RTL and testbench issues using industry-standard tools.
Collaborate with design, architecture, and cross-functional teams to meet project milestones.
Maintain and enhance verification environments for scalability and reuse.

Skills & Experience

Strong expertise in SystemVerilog/UVM and coverage-driven verification methodologies.
Proven experience building and maintaining medium-to-complex SV/UVM environments.
Proficiency in writing efficient constraint-random tests and achieving coverage closure.
Strong debugging skills using tools like Verdi or similar.
Exposure to wireless IPs (Wi-Fi, Modem PHY, DSP blocks) is a plus.
Familiarity with formal/static verification techniques.
Power-aware verification and Gate-Level Simulation (GLS) experience is highly desirable.
Scripting skills (Python, Perl) for automation.

Qualifications

Education: Bachelors or Masters or PhD in Electrical/ Electronics/ Computer Science from a reputed institution.
Experience: 2- 12 years

Soft Skills

Good communication and interpersonal skills.
Flexibility to work with global teams.

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Wireless R&D IP Verification Lead Engineer, Senior