Verification Manager

As a Design Verification Lead/Manager with 8-18 years of experience in IP/Subsystem level Verification, you will be responsible for overseeing the verification process. You should have a strong background in verifying PCIe protocol, including Gen4, Gen5, and Gen6. In addition, you should possess good knowledge of PCIe transaction layer, routing, reset flows, as well as experience with AXI protocol and NOC subsystem verification. Your role will require solid SV-UVM knowledge and hands-on experience in testbench development. Strong debugging skills are essential for this position. Knowledge of performance verification would be considered a plus. As a leader, you will be expected to manage a team of 8-10 members and take technical ownership of the project. Your ability to lead and guide the team effectively will be crucial for the successful completion of the verification tasks.,