10 Svuvm Jobs

You have an exciting opportunity with Tessolve Semiconductor in Bangalore for the roles of RTL Design Engineer and Design Verification Engineer. For the position of RTL ASIC Engineer, you should have at least 7 years of work experience in ASIC/IP Design with expertise in Logic design and RTL design. Your responsibilities will involve IP design and integration, along with proficiency in tools such as Lint and CDC for ASIC development. Knowledge of Synthesis and understanding of timing concepts would be advantageous. Additionally, familiarity with AMBA protocols like AXI, AHB, APB, and SoC clocking/reset architecture is preferred. As a Design Verification Engineer, you are required to have 5 to 20 years of experience. You should be well-versed in IP verification using SV/UVM, SOC Verification using C/SV, and Third Party VIP Integration. Your expertise in Interconnect Protocols such as AHB, AXI, APB, SOC Interfaces like GPIO, SPI, I2C, UART, High-Speed Serial Interfaces including PCIe Gen 3/4, USB, MIPI, and Memory Interfaces like DDR or HBM I/O will be crucial. Proficiency in Coverage Closure (Code, Functional, Toggle) and tools like Synopsys VCS or Cadence Incsive is essential. Experience in Technical Documentation, Foundry Porting, and Technology Library Conversion related to Verification will be advantageous. If you meet the requirements and are interested in these positions, please share your updated CV with Gayatri Kushe at gayatri.kushe@tessolve.com or contact at 6361542656. Thank you for considering this opportunity with Tessolve Semiconductor.,

Wipro Limited is a leading technology services and consulting company dedicated to developing innovative solutions that cater to the most intricate digital transformation needs of clients. With a vast portfolio of capabilities in consulting, design, engineering, and operations, Wipro assists clients in achieving their most ambitious goals and establishing future-ready, sustainable businesses. The company, with over 230,000 employees and business partners operating in 65 countries, is committed to aiding customers, colleagues, and communities in thriving amidst a constantly changing world. For more information, visit www.wipro.com. As a Lead Design Verification Engineer with at least 7 years of hands-on DV experience in SystemVerilog/UVM, you will be responsible for owning and driving the verification of a block/subsystem or a SOC. An ideal candidate should have a proven track record of leading a team of engineers and possess extensive experience in IP/sub-system and/or SoC level verification based on SV/UVM. Proficiency in Tesplan and Testbench development, execution of test plans using high-quality constrained random UVM tests to achieve coverage goals on time, and adeptness in debugging and exposure to all aspects of verification flow including Gatesims are essential. The candidate must have extensive experience in the verification of technologies such as PCI Express or UCIe, CXL or NVMe, AXI, ACE or CHI, Ethernet, RoCE or RDMA, DDR or LPDDR or HBM, ARM or RISC-V CPU based subsystem or SOC level verification using C/Assembly languages, and Power Aware Simulations using UPF. Experience in using EDA tools like VCS, Verdi, Cadence Xcelium, Simvision, Jasper, and revision control systems such as Git, Perforce, Clearcase is required. Experience in SVA and formal verification is desirable, and knowledge of script development using Python, Perl, or TCL is an added advantage. The position is available in various locations including Bangalore, Hyderabad, Kochi, Pune, Ahmedabad, and Pune. The ideal candidate must have a minimum of 7 years of YoE. Key Responsibilities: - Define product requirements and implement VLSI and hardware devices - Continuously upgrade and update design tools and frameworks - Analyze and select the right components and hardware elements for product engineering - Conduct cost-benefit analysis to choose the best design - Develop architectural designs for new and existing products - Implement derived solutions and troubleshoot critical problems - Evangelize architecture to project and customer teams to achieve the final solution - Monitor product solution and make continuous improvements - Understand market-driven business needs and technology trends to define architecture requirements and strategy - Develop Proof of Concepts (POCs) to demonstrate product feasibility - Provide solutioning for RFPs from clients and ensure overall product design assurance - Collaborate with sales, development, and consulting teams to reconcile solutions to architecture - Provide technical leadership in designing custom solutions using modern technology - Validate solutions from technology, cost structure, and customer differentiation perspectives - Identify and resolve problem areas in architectural design and solutions - Monitor industry and application trends and provide strategic input during product deployment - Support delivery team in product deployment and issue resolution - Develop product validation and performance testing plan in alignment with business requirements - Maintain product roadmap and provide inputs for product upgrades based on market needs - Build competencies and branding through necessary trainings, certifications, and Thought leadership content development - Mentor developers, designers, and junior architects for career enhancement - Contribute to the architecture practice by conducting selection interviews Performance Parameters: - Product design, engineering, and implementation: Measure based on CSAT, quality of design/architecture, FTR, delivery as per cost, quality, and timeline, POC review and standards - Capability development: Measure based on % of trainings and certifications completed, mentorship of technical teams, and development of Thought leadership content Wipro is dedicated to reinventing your world by building a modern, end-to-end digital transformation partner with ambitious goals. The company is looking for individuals who are inspired by reinvention and are committed to constant evolution in their careers and skills. Join Wipro to realize your ambitions and be part of a purpose-driven business that empowers you to design your own reinvention. Applications from people with disabilities are explicitly welcome.,

At Cadence, we are seeking a Software Engineer II to join our team in Ahmedabad. We are a company that values innovation and leadership in the technology industry. If you have 2+ years of domain experience and proficiency in functional verification using SV/UVM with strong debugging skills, then this role might be a great fit for you. In addition, having a solid foundation in Digital Electronics and Programming, along with hands-on knowledge of C/C++/Scripting is essential. Experience with MIPI is a plus, as well as prior VIP usage and development experience. Cadence is a renowned leader in electronic design with over 30 years of expertise in computational software. Our Intelligent System Design approach enables us to provide software, hardware, and IP solutions that bring design concepts to life. Our customers are some of the most innovative companies in the world, spanning various industries such as consumer electronics, hyperscale computing, 5G communications, automotive, aerospace, industrial, and health sectors. As a Software Engineer II at Cadence, you will be responsible for designing and developing VIP using C/C++. You will also manage multiple VIPs, lead a small team, and engage with customers. The ideal candidate will have a BE/BTech/ME/MS/MTech degree in Electrical/Electronic or equivalent field and possess strong analytical and communication skills. Furthermore, you should be self-motivated, with a passion for learning and exploring new technologies. In this role, you will have the opportunity to work with a diverse team of talented individuals who are dedicated to customer success and fostering innovation. Cadence offers a supportive work environment that encourages creativity and collaboration. Our employee-friendly policies prioritize the well-being and career development of our employees, providing opportunities for growth and recognizing individual successes. If you are someone who thrives in a dynamic and fast-paced environment, enjoys pushing boundaries to find creative solutions, and values integrity in all aspects of your work, then we would love to hear from you. Join us at Cadence, where we are committed to making a difference through impactful technology solutions. Contact: kmadhup@cadence.com Name: K Madhu Prasad Cadence - Solve what others can't. Join us in doing work that matters.,

This position offers a compelling opportunity for a skilled and driven verification engineer to become a valuable member of the Arm Systems Media IP team. The team is focused on designing Image Signal Processors (ISPs), Display Processors, and Video codecs for deployment within Arm Compute Subsystems across diverse markets such as automotive, IoT, and client segments. Our intellectual property includes RTL, reference drivers, tools, and libraries, which empower our clients to innovate and develop cutting-edge products. Your primary responsibilities will involve specifying and creating new hardware verification testbenches for upcoming hardware IP iterations. You will enhance existing testbenches to boost performance, quality, and efficiency. Additionally, you will be tasked with identifying areas for process and methodology enhancement, implementing necessary changes to elevate hardware verification practices. This role offers a unique opportunity to contribute to the team's growth and your professional advancement. Key Responsibilities: - Taking ownership of verification at the unit level or multi-unit hierarchy, or leading verification efforts for an entire IP (ISP, Display, Video). - Designing verification IP and comprehensive verification environments. - Evaluating proposed design modifications based on verification complexity. - Analyzing simulation data using machine learning and data science techniques for effective bug detection and debugging. - Recognizing opportunities for process and methodology improvement within Media IP, driving efficiency in hardware verification. - Collaborating closely with other Arm engineering teams to deliver high-quality IP that integrates seamlessly into complete systems. - Mentoring and supporting team members. Required Skills and Experience: - Proficiency in constrained-random verification, including the development of complex verification environments and testbenches. - Expertise in developing reusable and scalable code, with a strong command of SV-UVM. - Proficient scripting skills to create scripts supporting various flows. - Solid software engineering skills encompassing object-oriented programming, data structures, and algorithms. - Familiarity with tools and processes for testbench development and verification completion. - Previous technical and/or team leadership experience, essential for senior roles. Desired Skills and Experience: - Experience in team leadership and mentoring. - Knowledge of multiprocessing microarchitecture, including bus protocols like AMBA APB/AHB/AXI. - Past involvement in Formal Verification testbenches. - Experience with video codec, ISP, or display projects, including familiarity with advanced image processing algorithms. - Understanding of Functional Safety product development for the Automotive market, applying standards such as ISO 26262 and/or IEC 61508. - Exposure to Continuous Integration flows. In Return: This role offers you the opportunity to leverage your engineering expertise to support innovative technologies that will impact millions of devices over the long term. You will have the platform to advocate for and implement your ideas on a broader scale, while enhancing your technical leadership and influence. Should you require any accommodations or support to excel during the recruitment process, please reach out to accommodations@arm.com. Your requested information will be handled with confidentiality, and any accommodations will be arranged accordingly. Arm's Hybrid Working Approach: Arm's hybrid working model is designed to foster a work environment that promotes both high performance and personal well-being. We believe in the importance of in-person interactions for productivity, while also acknowledging the value of flexibility. Teams are empowered to determine their own hybrid working patterns based on the nature of their work and team requirements. Specific details regarding hybrid working arrangements for each role will be communicated during the application process. We are committed to collaborating with you to find the best solution that aligns with local legal, regulatory, tax, and other considerations. For more insights on how this approach can be tailored to your needs, please engage with us. Equal Opportunities at Arm: Arm is dedicated to providing equal opportunities for all individuals, fostering an inclusive work environment where diversity is celebrated and respected.,

As a Principal Software Engineer at Cadence, you will have the opportunity to work on cutting-edge technology in an environment that encourages creativity, innovation, and making a real impact. Cadence, a pivotal leader in electronic design, with over 30 years of computational software expertise, is seeking a candidate to join their highly talented team in Bangalore or Ahmedabad. In this role, you will be responsible for developing, implementing, and testing features for the next generation of verification IP tools. The ideal candidate should have excellent communication skills, the ability to quickly ramp up on new technologies independently, and a strong background in functional verification using SV/UVM. Additionally, hands-on knowledge of Python/Scripting, experience with memories such as HBM, LPDDRR, GDDR, and DDR, as well as prior VIP usage and development experience would be advantageous. Cadence offers an employee-friendly work environment that focuses on the physical and mental well-being of its employees, career development, learning opportunities, and celebrating success. The company's unique One Cadence - One Team culture promotes collaboration to ensure customer success, while providing avenues for learning and development based on individual interests and requirements. Qualifications for this role include a BE/BTech/ME/MS/MTech in Electrical/Electronics or equivalent, along with strong analytical and communication skills. The successful candidate should be self-motivated, possess strong written, verbal, and presentation skills, and have the ability to establish close working relationships with both customers and management. Creativity, the willingness to explore unconventional solutions, and the ability to work effectively across functions and geographies are essential behavioral skills required for this position. Join Cadence and be part of a diverse team of passionate individuals dedicated to making a difference in the world of technology. If you are ready to work in a supportive and friendly environment where innovation and collaboration are valued, we encourage you to apply for the Principal Software Engineer position by sending your CV to kmadhup@cadence.com. Regards, Madhu,

As a Design Verification Lead/Manager with 8-18 years of experience in IP/Subsystem level Verification, you will be responsible for overseeing the verification process. You should have a strong background in verifying PCIe protocol, including Gen4, Gen5, and Gen6. In addition, you should possess good knowledge of PCIe transaction layer, routing, reset flows, as well as experience with AXI protocol and NOC subsystem verification. Your role will require solid SV-UVM knowledge and hands-on experience in testbench development. Strong debugging skills are essential for this position. Knowledge of performance verification would be considered a plus. As a leader, you will be expected to manage a team of 8-10 members and take technical ownership of the project. Your ability to lead and guide the team effectively will be crucial for the successful completion of the verification tasks.,

SENIOR VERIFICATION ENGINEER- SV UVM SmartSoC is looking for smart and enterprisingDesign Verification engineers to come to join us and get an opportunity to do some cutting-edge work and also work in a great environment where work is Always Fun and Exciting. SmartSoCs is currently working on multiple in-house turnkey projects and client site projects and many of our projects involve complete verification from spec to closure including building complete DV environments in SV-UVM. Job Responsibilities- Build SV, SV UVM, OVM based environments. Work with many different networking and other protocols Desired Skills and Experience- 3 to 10 years of experience in IP verification Good experience in SV/ UVM based verification project. Good debug skills is a must. Experience in building components like Scoreboard, functional coverage & writing sequences using SV/UVM based Verification environment One of the following experiences is important: Experience in Video/Display domain in particular DP, oLDI, MIPI CSI/ DSI Experience in any one high speed protocol like USB3, PCIe, MIPI, Unipro etc Job Category VLSI (Silicon engineering) Job Location FinlandOulu IndiaBangalore IndiaChennai IndiaHyderabad IndiaNoida Malaysia Singapore SwedenStockholm USADelaware

You will be responsible for verifying IP sub-systems with a minimum of 5 years of solid verification experience. Your key tasks will include creating SV/UVM based testbenches, writing test cases, developing checkers, monitors, debugging, and performing coverage analysis. Preference will be given to candidates with IP level verification experience in high-speed IOs such as DDR/USB/PCIE. Additionally, you should have a good understanding of infrastructure and tools like Perl and Python. Senior leads are expected to have hands-on experience as well as leadership responsibilities. The expected time for onboarding for this full-time, onsite position in Bangalore is immediate. As an equal opportunity employer, TekWissen Group supports workforce diversity.,

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Candidate will be responsible for IP Level Verification of Qualcomm Spectra Camera Sub Systems Modules for next gen Qualcomm product portfolio. This role will require the candidate to understand details of the camera signal processing modules, verify them at module & subsystem level for enhanced features. Engineer should independently be able to own the verification of IP level modules end to end with continuous enhancements and collaborate with IP Verification, Design and System leads. Necessary skills/experience: 1+ years of experience in RTL design verification using SystemVerilog/UVM and industry-standard simulation tools (Mandatory) Experience in power aware simulation is a big plus Experience on camera verification is a big plus Expertise in Coverage closure , RTL debug skills Expertize in SV – UVM, Assertions based verification, DPI Familiarity in Firmware/emulation (exVeloce) based verification , GLS Familiarity with bus protocols like AHB, AXI, ARM based system architecture Experience with Perl, Python, or similar scripting language Excellent problem solving skills & Verification aptitude Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

SENIOR VERIFICATION ENGINEER – SV UVM SmartSoC is looking for smart and enterprisingDesign Verification engineers to come to join us and get an opportunity to do some cutting-edge work and also work in a great environment where work is Always Fun and Exciting. SmartSoCs is currently working on multiple in-house turnkey projects and client site projects and many of our projects involve complete verification from spec to closure including building complete DV environments in SV-UVM. Job Responsibilities- Build SV, SV UVM, OVM based environments. Work with many different networking and other protocols Desired Skills and Experience- 3 to 10 years of experience in IP verification Good experience in SV/ UVM based verification project. Good debug skills is a must. Experience in building components like Scoreboard, functional coverage & writing sequences using SV/UVM based Verification environment One of the following experiences is important: Experience in Video/Display domain in particular DP, oLDI, MIPI CSI/ DSI Experience in any one high speed protocol like USB3, PCIe, MIPI, Unipro etc Job Category VLSI (Silicon engineering) Job Location FinlandOulu IndiaBangalore IndiaChennai IndiaHyderabad IndiaNoida Malaysia Singapore SwedenStockholm USADelaware Location - Bengaluru,Chennai,Hyderabad,Noida