SW Development Engineer

As an experienced HDL design/verification engineer at Lattice Semiconductors, you will play a pivotal role in designing, developing, and enhancing simulation capabilities within Lattice Radiant, the official FPGA design tool. Working closely with hardware developers and QA teams, you will be responsible for enabling and supporting simulation workflows for Verilog, VHDL, and SystemVerilog across various Lattice FPGA families. Your key responsibilities will include diagnosing and resolving simulation issues, validating and testing simulation features, contributing to automation scripts and testbench generation tools, as well as maintaining simulation documentation, troubleshooting guides, and user tutorials. You will have the opportunity to work on cutting-edge technologies and have a direct impact on the evolution of FPGA development tools and methodology. To excel in this role, you must possess a Bachelor's or Master's degree in Electronics Engineering or a related field, along with solid experience in hardware description languages (HDLs) and simulation tools such as Modelsim and Synopsis VCS. A strong understanding of HDL simulation concepts, EDA tool development, FPGA architectures, and configuration flows is essential. Industrial experience in a similar field for more than 5 years is a requirement. Preferred skills for this role include strong analysis and debugging capabilities, as well as excellent communication and cross-disciplinary collaboration skills. In return, Lattice Semiconductors offers competitive compensation, comprehensive benefits, a highly collaborative and intellectually driven team environment, and supportive cross-geo team environment with technical mentorship. If you thrive in a fast-paced, results-oriented environment and are looking to contribute to a dynamic team, Lattice Semiconductors may be the perfect fit for you.,