12 Verification Engineer Jobs

Job Title: Verification Engineer Job Location: Hyderabad Experience: 5 to 8 years Education: B.E./B.Tech/M.E./M.Tech in ECE, Electrical, or VLSI Design or equivalent Job Description: we are seeking a Verification Engineer specializing in Static Timing Analysis (STA) and Standard Cell Characterization for advanced memory product development (HBM, DRAM). The role involves working closely with cross-functional design and verification teams to ensure robust, high-performance memory solutions. Responsibilities: Perform Static Timing Analysis at block, cell, and full-chip levels for DRAM/memory designs. Characterize standard cells (up to 40% effort) using PrimeLib, SiliconSmart Create and validate...

4+ years of experience in System Verilog & UVM. Expertise in any one of the industry standard protocol like PCIe, Ethernet, DDR, USB, UCIe, AXI etc.

Worked on 7NM/5NM and lower nodes Should have prior experience in handling full chip DRC,LVS, ANTENNA and PERC Expert in using calibre for DRC & LVS Should be self-driven and motivated Resource should be committed to SD till Tapeout

You should have experience in Logic design and RTL coding, as well as SoC design and integration for complex SoCs. Proficiency in Verilog/System-Verilog and Multi Clock designs including Asynchronous interfaces is essential. Familiarity with ASIC development tools such as Lint and CDC is required. Knowledge of Synthesis and understanding of timing concepts is a plus. Experience with ECO fixes, formal verification, and AMBA protocols like AXI, AHB, and APB, along with SoC clocking/reset architecture is necessary. Strong communication skills, proactive attitude, creativity, curiosity, motivation to learn, and good collaboration skills are expected. Your responsibilities will include understand...

5+ exp in verification at IP/sub-system level. Well versed in (Digital design, SV, UVM). Experience in DDR, PHY protocols. Responsibilities: Develop and execute comprehensive verification plans and testbenches. Write high-quality, efficient, and reusable verification components. Create and maintain detailed verification documentation. Debug complex verification issues and propose solutions. Collaborate with design engineers to ensure design quality and performance. Stay up-to-date with the latest verification methodologies and tools.

As an experienced HDL design/verification engineer at Lattice Semiconductors, you will play a pivotal role in designing, developing, and enhancing simulation capabilities within Lattice Radiant, the official FPGA design tool. Working closely with hardware developers and QA teams, you will be responsible for enabling and supporting simulation workflows for Verilog, VHDL, and SystemVerilog across various Lattice FPGA families. Your key responsibilities will include diagnosing and resolving simulation issues, validating and testing simulation features, contributing to automation scripts and testbench generation tools, as well as maintaining simulation documentation, troubleshooting guides, and ...

We are hiring on below Design Verification Engineer/ RTL Design Engineer - Engineer/Lead/Senior Lead . Please find the JD Details below - Please share us your details below in Table with your update resume. Job Descriptions : Please specify for which role your application is for - DV/RTL JD - Design Verification Engineer - Engineer/Lead/Senior Lead JD - RTL Design Engineer- Engineer/Lead/Senior Lead Qualifications: Bachelors degree in electrical engineering, Computer Engineering, or a related field (masters degree a plus) Experience in design verification for ASICs or SoCs Strong understanding of digital design principles (combinational logic, sequential logic) Proven ability to develop and ...

As a highly experienced Verification Engineer at our dynamic team, you will drive innovation in advanced verification methodologies for complex semiconductor designs. Your key responsibilities will include leading the deployment of verification tools, platforms, and strategies for complex IPs, driving simulation-based and hardware-assisted verification efforts, applying expertise in various verification technologies, developing and enhancing verification methodologies, collaborating cross-functionally with IP design and DV teams, and mentoring junior engineers to foster a culture of technical excellence. You should have 10+ years of experience in verification engineering for complex hardware...

Job Description : We are looking for experienced DV Engineers with a strong background in ARM-based SoC and Subsystem Verification to join our team for exciting semiconductor projects. Key Responsibilities : Perform Design Verification of ARM-based SoC / SS level components Work on Cortex-A / Cortex-M series SoC Debug using CoreSight infrastructure (implementation or validation) Handle RTL / GLS regressions and perform deep simulation-level debugging Develop or maintain testbenches, checkers, and scoreboards in SystemVerilog/UVM Implement C/C++ modeling as needed for verification environments Technical Skills Required : Strong hands-on in SystemVerilog, UVM Experience with ARM protocols : AX...

5+ exp in verification at IP/sub-system level. Well versed in (Digital design, SV, UVM). Experience in DDR, PHY protocols. Responsibilities: Develop and execute comprehensive verification plans and testbenches. Write high-quality, efficient, and reusable verification components. Create and maintain detailed verification documentation. Debug complex verification issues and propose solutions. Collaborate with design engineers to ensure design quality and performance. Stay up-to-date with the latest verification methodologies and tools.

Well versed in (Digital design, SV, UVM). Experience in DDR, PHY protocols. Responsibilities: Develop and execute comprehensive verification plans and testbenches using UVM methodologies. Write and debug complex SystemVerilog test code for functional, performance, and regression testing. Collaborate with design engineers to understand and analyze design specifications. Identify, debug, and isolate design issues. Participate in design reviews and contribute to design improvements. Maintain and enhance existing verification environments. Stay abreast of the latest verification methodologies and tools.

Overview: TekWissen is a global workforce management provider throughout India and many other countries in the world. Position: DV Engineer Very good in Ethernet, SV & UVM Location: Bangalore Work Type: Onsite Job Type: Full time Job Description: Experienced Design Verification Engineer with a minimum of 6 years in pre-silicon verification. The ideal candidate will have strong hands-on experience with SystemVerilog, UVM methodology, and a solid understanding of SoC/IP-level verification flows. This role involves working closely with design, architecture, and post-silicon teams to ensure high-quality and robust product delivery. Key Responsibilities: Develop testbenches, testcases, and verifi...