Staff/ Sr Staff Engineer

As a Senior Staff Engineer at Qualcomm India Private Limited, you will be responsible for performing STA setup, convergence, reviews, and signoff for multi-mode, multi-voltage domain designs for SoC & SubSystem. You will also validate and debug timing across multiple PVT conditions using tools like PrimeTime and Tempus. Additionally, you will run STA flows, correlate Spice to STA results, evaluate timing methodologies/tools, and automate STA/PD flows using TCL/Perl/Python. Collaboration with design, DFT, synthesis, technology, CAD, and physical implementation teams will be essential. Your knowledge of low-power techniques such as clock gating, power gating, and multi-voltage designs will be crucial in this role. **Key Responsibilities:** - Perform STA setup, convergence, reviews, and signoff for multi-mode, multi-voltage domain designs - Validate and debug timing across multiple PVT conditions using tools like PrimeTime and Tempus - Run STA flows, correlate Spice to STA results - Evaluate timing methodologies/tools and automate STA/PD flows using TCL/Perl/Python - Collaborate with design, DFT, synthesis, technology, CAD, and physical implementation teams - Handle timing ECOs (DMSA, tweaker, PrimeClosure) and logical equivalence checks (RTL to Netlist) **Qualifications Required:** - 10+ years of relevant experience - Strong expertise in STA fundamentals, AOCV/POCV concepts, CTS, and timing constraints - Hands-on experience with STA tools: PrimeTime, Tempus - Familiarity with ASIC back-end flows: ICC2, Innovus - Knowledge of signal integrity, cross-talk noise, and parasitic extraction - Proficiency in scripting languages: TCL, Perl, Python - Mentoring junior engineers in different areas of timing flows and methodologies - Understanding of Spice simulations: Hspice, FineSim, Monte Carlo analysis Qualcomm India Private Limited is looking for candidates with a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. Alternatively, candidates with a Master's degree and 5+ years of experience or a PhD with 4+ years of experience are also encouraged to apply. Preferred experience includes driving timing convergence at chip-level and hard-macro level, exposure to RTL-to-GDSII flows, and good technical writing and communication skills for cross-team collaboration. If you believe you meet the qualifications and are interested in this role, feel free to reach out to Qualcomm Careers for more information.,