8 Spice Simulations Jobs

Xbattery is a deep-tech energy startup that is focused on developing BharatBMS, a unified, modular Battery Management System platform designed for both Electric Vehicles (EVs) and Energy Storage Systems (ESS). The company, which is currently incubated at T-Works, Hyderabad, collaborates with leading OEMs and energy companies to create scalable, secure, and India-compliant BMS solutions that can compete with the best globally. As the Lead BMS Hardware Engineer at Xbattery, you will be responsible for overseeing the complete hardware design process of our BMS boards. This includes everything from defining the architecture and schematics to PCB design, validation, and ensuring compliance. In this role, you will also lead and mentor a team of hardware engineers, establish structured design processes, and ensure that our designs meet the highest automotive-grade safety, reliability, and certification standards. Your key responsibilities will include leading the architecture, schematic design, and PCB development of BMS boards, designing circuits for various components such as AFE integration, microcontrollers, power electronics, contactor control, isolation, and protection. You should have expertise with specific MCUs like NXP S32K3, TI C2000, or Infineon Aurix in BMS/automotive applications. Additionally, you will drive design reviews, simulations, and verification plans while collaborating closely with embedded/software teams for efficient hardware-software co-design. To be successful in this role, you should possess a Bachelor's or Master's degree in Electrical/Electronics Engineering or a related field, along with at least 7+ years of experience in hardware design, including a minimum of 3+ years in BMS/EV/automotive electronics. Hands-on experience with tools like Altium Designer and OrCAD is essential, as well as familiarity with high-voltage, high-current PCB design, isolation techniques, and thermal management. Moreover, you should demonstrate a solid understanding of cell monitoring ICs, multi-layer PCB design, safety requirements, and regulatory testing standards. Excellent problem-solving, documentation, and leadership skills are crucial for this role. Bonus points if you have experience with signal integrity analysis, SPICE simulations, SiC/GaN power devices, or cybersecurity for BMS. Joining Xbattery offers you the opportunity to contribute to building India's first scalable, modular BMS platform that competes with global leaders. You will work on cutting-edge EV and ESS systems ranging from 48V to 800V, collaborate with a passionate deep-tech team, and enjoy the fast-paced startup culture with strong ownership and growth opportunities while defining standards and processes for the hardware team.,

You are looking for Analog Mixed Signal Designers to join our team and work on designing building blocks for high-speed IPs such as DDR, LPDDR, HBM, UCIe, and PCIe. As a member of our team, your responsibilities will include deriving circuit block level specifications from top-level specifications, designing optimized transistor-level analog and custom digital blocks, conducting Spice simulations to meet detailed specifications, guiding layout design for optimal performance, matching, and power delivery, performing performance characterization of designs in various conditions including reliability checks, and generating/delivering behavioral, timing, and physical models of circuits. You will also be involved in conducting design reviews at different phases of the design process. To be successful in this role, you should have a BE/M-Tech degree in Electrical & Electronics, strong fundamentals in RLC circuits, CMOS devices, digital design building blocks, and prior experience with custom design environments and spice simulators. A collaborative and positive attitude is essential for working effectively in our team. Depending on your experience level, you will be designated as a Design Team Member (0-4 years), a Technical Lead/Mentor (4-7 years), or a Team Lead/Manager (7+ years). Some example designs you may work on include Wireline channel transmitters, receivers, equalization circuits, serializers, deserializers, bandgap references, PLLs, DLLs, phase interpolators, comparators, DACs, and ADCs. Joining our team will provide you with opportunities for growth and learning, including close collaboration with experienced mentors and exposure to advanced process technologies such as 12nm, 7nm, 5nm, 3nm, and 2nm. We offer a fast-paced environment for high-performance individuals who are ready to take on challenges and advance their careers. If you are interested in this fantastic opportunity, please reach out to poojakarve@arf-design.com to learn more.,

You will be responsible for designing and optimizing memory architectures for high-performance and low-power applications as a skilled SRAM & ROM IC Memory Design Engineer. Your main tasks will include designing, simulating, and verifying SRAM and ROM memory blocks while collaborating with cross-functional teams in circuit design, layout, verification, and technology development. Key responsibilities for this role include designing and developing SRAM and ROM memory architectures for various semiconductor applications, performing transistor-level circuit design and simulation, optimizing power, performance, and area (PPA) of memory designs, conducting timing, reliability, and variation analysis, working closely with physical design engineers, implementing redundancy and error correction techniques, and supporting design verification and validation processes. To qualify for this position, you should have a Bachelor's or Master's degree in Electrical Engineering or a related field, along with at least 3 years of experience in SRAM/ROM memory design for semiconductor applications. Strong knowledge of CMOS circuit design, transistor-level simulation, and memory architecture is required, as well as experience with circuit simulators such as SPICE, Spectre, HSPICE, and proficiency in tools like Cadence Virtuoso, Synopsys Custom Compiler, or equivalent. Join us at onsemi (Nasdaq: ON), where we are dedicated to driving disruptive innovations for a better future, focusing on automotive and industrial end-markets. We are at the forefront of megatrends such as vehicle electrification, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a diverse and innovative product portfolio, we create intelligent power and sensing technologies that address the world's most complex challenges and pave the way towards a safer, cleaner, and smarter world. For more information on our company benefits, please visit: https://www.onsemi.com/careers/career-benefits At onsemi, we are committed to attracting high-performance innovators and providing all candidates with a positive recruitment experience that showcases us as a great place to work.,

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life's work, to amplify human creativity and intelligence. As an NVIDIAN, you'll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world! We are now looking for a Circuit Design Engineer! What You'll Be Doing Be part of a hardworking, talented, cross-functional Global Circuits Team, designing and delivering groundbreaking circuit IPs involving SRAM arrays, Analog and/or Digital circuits. Work on architecting innovative circuit solutions and methodologies which monitor, measure on-chip silicon performance parameters and close the gap to pre-silicon estimations for logic and RAMs. Participate in discussion with various teams to understand challenges related to Silicon correlation (Vmin, Vmax, VF, Yield, spice modelling, silicon debug) and propose innovative solutions. Understanding of existing circuit methodologies for logic/RAMs and suggest improvements. This role includes interacting with several global teams across geographies, understanding various methodologies and improving silicon correlation of logic and RAM circuits. Be a mentor/technical lead for junior team members. What We Need To See Have sound fundamentals of CMOS devices, RC circuits, transistor level circuit design, timing concepts involving dynamic and sequential circuits. Hands-on experience in SRAM/Custom circuit design involving SPICE simulations, variation/selftime/bitcell/SA analysis. Knowledge of STA, physical design and Silicon debug is a huge plus. Ability to close design to the specs by running and developing various flows like EM, IR, Noise, and static timing analysis (STA). Proficient in Perl/Python and handling of large data sets is a huge advantage. Good interpersonal skills; should be an excellent teammate. BE/M-Tech in Electrical & Electronics or equivalent experience. 3-6 years of experience. With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the technology world's most desirable employers. We welcome you to join our team with some of the most hard-working people in the world working together to promote rapid growth. Are you passionate about becoming a part of a best-in-class team supporting the latest in GPU and AI technology

You will be part of ACE India, in the P-Core design team driving Intel's latest CPUs in the latest process technology. As a member of the team, you will lead the design analysis and methodologies of various memory blocks, ensuring they meet over 5GHz frequency and low-power digital designs with optimal area utilization. Your role will involve a deep understanding of different memory design concepts such as SRAM, RF, and ROM along with expertise in static timing analysis concepts. Close collaboration with Layout and Floor planning teams will be essential for successful back end design implementation of new features. Additionally, you will specialize in memory post-silicon analysis and possess a good grasp of statistical variation. To qualify for this position, you must hold a master's degree in electrical or computer engineering with a minimum of 8 years of experience in the related field. Alternatively, a bachelor's degree with at least 10 years of experience will be considered. Technical expertise in synthesis, P and R tools is preferred for this role. Preferred qualifications include experience in digital design with a focus on high speed and low power, familiarity with Verilog/VHDL, and proficiency in Tcl, Perl, and Python scripting. A good understanding of spice simulations and analysis, custom circuit design, IO design, full chip clocking, and strong verbal and written communication skills are also desired. Previous experience in design and verification of high-speed clocks, hierarchical designs, and budgeting of latencies and skews will be beneficial. This role falls under the Experienced Hire category and is based in India, Bangalore. The Client Computing Group (CCG), responsible for driving business strategy and product development for Intel's PC products, is the primary business group for this position. CCG focuses on delivering purposeful computing experiences across various form factors such as notebooks, desktops, 2 in 1s, and all in ones, aiming to unlock people's potential through innovative products. The role will involve collaborating with industry partners to design and deliver a predictable cadence of leadership products, contributing to Intel's mission of enriching the lives of every person on earth. This role will be eligible for a hybrid work model, allowing employees to split their time between working on-site at the assigned Intel site and off-site. Please note that job posting details such as work model, location, or time type are subject to change.,

As an Applications Engineer at Lattice Semiconductor, you will play a crucial role within the Applications engineering organization. This position offers you the opportunity to work alongside a dynamic team where you can actively contribute, learn, and progress in your career. Your primary responsibilities will revolve around leading all aspects of power estimation and correlation for FPGA silicon products, from pre-silicon to post-silicon stages. You will be tasked with managing power-related projects throughout the architecture and production silicon design phases. Collaboration with cross-functional teams to establish power targets, correlation and measurement plans, and achieving system and design level power objectives will be a key part of your role. In this position, you will engage in power estimation, analysis, and correlation activities for individual silicon IPs, sub-systems, and end-user applications. Working closely with the software team, you will ensure accurate modeling of silicon models and measure power and performance goals using the Radiant tool suite. Additionally, you will partner with Sales, Marketing, and Field Applications teams to drive innovation and customer adoption of Lattice products. Your role will also involve assisting in the management of customer escalations and support tickets. To excel in this position, you must possess experience in pre-silicon power prediction and silicon power analysis. Proficiency in circuit or digital design, hardware engineering, silicon design flows, Verilog, and/or VHDL is essential. Hands-on lab experience and familiarity with silicon support, FPGA development, Prime Power or similar tool suites, signal and power integrity analysis, and spice simulations are highly desired skills. Strong English communication skills, both written and verbal, are a necessity. The ability to work independently and collaboratively in a team environment, coupled with excellent analytical and problem-solving abilities, will be crucial for success in this role. You should thrive in a fast-paced environment, effectively prioritize tasks, and manage competing priorities efficiently. At Lattice, we recognize that our employees are our most valuable asset and the driving force behind our success in the competitive global industry. We are committed to offering a comprehensive compensation and benefits program that attracts, retains, motivates, rewards, and celebrates the industry's top talent. Join us at Lattice Semiconductor, an international developer of innovative, low-cost, low-power programmable design solutions. With a global workforce of around 800 individuals who share a common dedication to customer success and a strong determination to excel, we provide an environment where diversity is valued. We welcome applications from all qualified candidates who can contribute to our workplace with their unique perspectives, insights, and values. Experience the energy at Lattice Semiconductor and be part of a team that is passionate about innovation and success.,

As an Analog Layout Engineer at ARF Design Pvt Ltd, you will be responsible for designing and developing analog layout IP blocks and integrating them into full-chip designs. Your expertise in lower technology nodes, physical layout techniques, and verification processes will be crucial for success in this role. You will collaborate with circuit design teams to optimize layout quality and performance, ensuring that layouts meet design matching and parasitic constraints. Working with advanced nodes like 7nm, 16nm, and 28nm, you will play a key role in advancing the company's cutting-edge projects. Key Responsibilities: - Design and develop analog layout IP blocks and full-chip integration - Perform and resolve LVS/DRC violations independently - Collaborate with circuit design teams to optimize layout quality and performance - Ensure layouts meet design matching and parasitic constraints - Work with advanced nodes like 7nm, 16nm, and 28nm Required Skills: - 3+ years of relevant Analog Layout experience - Proficiency in LVS/DRC checks and EDA tools - Experience with lower technology nodes (3nm, 5nm, 7nm, 10nm, 16nm, 28nm, etc.) - Good understanding of layout matching, parasitic extraction, and floor planning - Strong verbal and written communication skills - Ability to work independently and within cross-functional teams In this role, you will be a Circuit Design Engineer at ARF Design, working on the design of building blocks used in high-speed IPs such as DDR/LPDDR/HBM/UCIe/MIPI/PCIe. You will derive circuit block-level specifications from top-level specifications and perform optimized transistor-level design of analog and custom digital blocks. Running SPICE simulations to meet detailed specifications and guiding layout design for best performance, matching, and power delivery will be part of your responsibilities. You will also characterize design performance across PVT + mismatch corners and conduct design reviews at various phases/maturity of the design. Qualifications: - BE/M-Tech in Electrical & Electronics - Strong fundamentals in RLC circuits, CMOS devices, and digital design concepts (e.g., counters, FSMs) - Experience with custom design environments (e.g., Cadence Virtuoso, Synopsys Custom Design Family) and SPICE simulators - Collaborative mindset with a positive attitude If you have 3+ years of experience and possess the required skills, please share your updated resume [Name_Post_Exp] to divyas@arf-desgn.com. This is a full-time, permanent position located in person at Bhubaneswar and Ranchi.,

As an Analog Layout Engineer at ARF Design Pvt Ltd, you will be responsible for designing and developing analog layout IP blocks and full-chip integration. Your role will involve performing and resolving LVS/DRC violations independently, collaborating with circuit design teams to optimize layout quality and performance, and ensuring layouts meet design matching and parasitic constraints. You will have the opportunity to work with advanced nodes like 7nm, 16nm, and 28nm, leveraging your 3+ years of relevant Analog Layout experience. Key Responsibilities: - Design and develop analog layout IP blocks and full-chip integration - Perform and resolve LVS/DRC violations independently - Collaborate with circuit design teams to optimize layout quality and performance - Ensure layouts meet design matching and parasitic constraints - Work with advanced nodes like 7nm, 16nm, and 28nm Required Skills: - 3+ yrs of relevant Analog Layout experience - Proficiency in LVS/DRC checks and EDA tools - Experience with lower technology nodes (3nm, 5nm, 7nm, 10nm, 16nm / 28nm ETC) - Good understanding of layout matching, parasitic extraction, and floor planning - Strong verbal and written communication skills - Ability to work independently and within cross-functional teams In this role, you will be a Circuit Design Engineer at ARF Design, where you will be working on the design of building blocks used in high-speed IPs such as DDR/LPDDR/HBM/UCIe/MIPI/PCIe. Your responsibilities will include deriving circuit block level specifications from top-level specifications, performing optimized transistor-level design of analog and custom digital blocks, running SPICE simulations to meet detailed specifications, and guiding layout design for best performance, matching, and power delivery. Key Responsibilities: - Derive circuit block level specifications from top-level specifications - Perform optimized transistor-level design of analog and custom digital blocks - Run SPICE simulations to meet detailed specifications - Guide layout design for best performance, matching, and power delivery - Characterize design performance across PVT + mismatch corners and reliability checks (aging, EM, IR) - Generate and deliver behavioral (Verilog), timing (LIB), and physical (LEF) models of circuits - Conduct design reviews at various phases/maturity of the design Qualifications: - BE/M-Tech in Electrical & Electronics - Strong fundamentals in RLC circuits, CMOS devices, and digital design concepts (e.g., counters, FSMs) - Experience with custom design environments (e.g., Cadence Virtuoso, Synopsys Custom Design Family) and SPICE simulators - Collaborative mindset with a positive attitude If you have 3+ years of experience and are interested in these exciting opportunities, please share your updated resume [Name_Post_Exp] to divyas@arf-desgn.com. Join ARF Design for a chance to work on advanced nodes with fast-track interview and onboarding processes.,