Staff Engineer PCIe Verification

8 - 13 years

4 - 7 Lacs

Posted:1 day ago| Platform: Naukri logo

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Job Type

Full Time

Job Description

  • Will be responsible for verification of IP, Block, or Subsystem at Soc Level.
  • Generate appropriate documentation for verification.
  • Responsible for analyzing/debugging given blocks/tasks in verification.
  • Should be able to develop own verification environment, verification components developed.
  • You will report to Lead Engineer.
What you'll Need:
  • 8+ years of experience with a Bachelors/ Masters degree in the field of Electrical, Electronics, or computer engineering
  • Should have a good understanding of verification flow, challenges, and requirements of functional verification.
  • Have worked on IP level or Block level or SoC level functional verification.
  • Experience with digital verification aspects such as constrained random verification, functional coverage, code coverage, assertions, methodology philosophy.
  • Expert in System Verilog, Verilog, and OVM/UVM verification methodology.
  • Have working experience on AMBA interface protocols (AXI, AHB, APB) and CHI protocol.
  • Knowledge of Verilog/System Verilog, digital simulation, and debugging is a must.
  • Hands-on experience working with the following protocols is desired PCIe/CXL/HBM 2/2E/HBM3.
  • Experience with Perl, Python or similar scripting languages will be helpful.
  • Ability to adapt learn, quickly and willingness to proactively take on responsibilities beyond the job description to accomplish team goals.
As part of our commitment to the we'll-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes:
  • Competitive Compensation Package
  • Restricted Stock Units (RSUs)
  • Provisions to pursue advanced education from Premium Institute, eLearning content providers
  • Medical Insurance and a cohort of we'llness Benefits
  • Educational Assistance
  • Advance Loan Assistance
  • Office lunch Snacks Facility

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