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Renesas Electronics India Pvt. Ltd.
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Sr Staff Verification Engineer

Sr Staff Verification Engineer

Renesas Electronics India Pvt. Ltd.

0 - 1 years

20 - 25 Lacs

Hyderabad

Posted:1 day ago| Platform:

Apply

Skills Required

Automation DFT FPGA SOC Debugging Perl PCIE Firmware UVM Python

Work Mode

Work from Office

Job Type

Full Time

Job Description

We are seeking a

Senior Staff Verification Engineer

to lead and contribute to the functional verification of

complex SoC and IP designs

for next-generation

AI, HPC, and data center

products. The ideal candidate has extensive experience in

UVM/SystemVerilog

, SoC and IP-level verification, and is passionate about ensuring

first-pass silicon success

This role involves defining verification strategies, developing scalable environments, and collaborating cross-functionally with architecture, design, and software teams.

Experience with Virtual Modeling, SystemC, and TLM

is a

plus

, enabling advanced verification and early system-level validation.

Qualifications

Required Qualifications

Education & Experience
- B. S. /M. S. in Electrical Engineering, Computer Engineering, or related field.
- 8+ years of experience
  in IP/SoC verification with a proven track record of successful silicon delivery.
Technical Expertise
- Deep knowledge of
  UVM/SystemVerilog
  for testbench development and verification IP integration.
- Strong understanding of SoC architecture and protocols such as
  DDR5, HBM3, PCIe Gen6, CXL 3. 0
  , and other high-speed interfaces.
- Expertise in
  coverage-driven verification
  , constrained-random testing, and assertion-based verification.
- Proficient in
  debugging RTL, testbenches, and simulation failures
  using industry-standard tools.
Tools & Languages
- Hands-on experience with simulation tools (VCS, Xcelium, Questa, etc. ), waveform viewers, coverage tools, and automation scripting (Python, Perl, TCL).

Preferred/Additional Skills

Virtual Modeling and System-Level Verification
- Familiarity with
  SystemC
  and
  Transaction-Level Modeling (TLM)
  for virtual prototyping and early system validation.
- Experience developing or using
  virtual platforms
  for hardware/software co-verification is a strong plus.
Emulation & Prototyping
- Exposure to
  emulation platforms
  (Palladium, ZeBu) and FPGA-based prototyping for system-level validation and performance analysis.
Software Co-verification
- Experience working alongside firmware/software teams for
  pre-silicon software validation
  and early driver/OS bring-up.
Low-Power and DFT Verification
- Knowledge of
  power-aware verification
  (UPF/CPF) and
  DFT validation methodologies
  is desirable.

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