82 Silicon Validation Jobs - Page 4

Pre-Silicon Validation Engineer Experience4 to 10 Years QualificationB.E / B. Tech / M.E / M. Tech Essential Duties & Responsibilities: Creating test environments, checker strategies, and test generators for validating embedded power management firmware in the SOC Communicating effectively, coordinating and working with firmware developers and SOC integration teams Potentially participating in the debug of failures in silicon and developing new testing strategies to detect these failures on pre-silicon models Mentoring junior members of the team in their development You should have 3-5 years of experience in the following areas: SoC development, verification, or integration using Verilog/SystemVerilog/OVM/UVM Reading and interpreting technical specs and Register Transfer Level (RTL) code SW development skills (Unit Testing, Test Driven Development) Hands-on Debug Preferred Skills and Experience: Expertise in any of one domain like Audio, Performance, power management will be a huge plus 4+ years’ experience with writing validation plans and implement those validation plans Job Category VLSI (Silicon engineering) Job Location FinlandOulu IndiaBangalore IndiaChennai IndiaHyderabad IndiaNoida Malaysia S. KoreaSeoul USATexas Location - Bengaluru,Chennai,Hyderabad,Noida

About Marvell . Your Team, Your Impact Marvells data center engineering group is a leading provider of innovative storage technologies, including ultra fast read channels, high performance processors, leading edge transceivers, highly efficient analog designs, and powerful cryptographic engines. These solutions address all segments of the hard disk drive (HDD) and solid state drive (SSD) electronics markets and accelerator solutions. Many of the same technologies have been utilized in Marvell storage system solutions products, powering PCs, servers, cloud, and enterprise systems. What You Can Expect Design and execute post silicon validation tests for SSD Chipsets, during R&D processes. Develop, port and execute bare metal SW to validate Storage SoCs. Job will involve Pre and Post Si testing of the bare metal functionality of the Storage SoC, including performance, and power. The candidate will also review and prepare test plans and test results documentation. Develop testing and benchmarking applications. Analyze the test results and generate professional validation reports. Provide technical support to Field Application Engineers who support customers. Provide technical support to Test Engineers who design tests for mass production. What Were Looking For We are looking for hardware validation/applications engineer with experience in Solid States Drive. Proficient in C/C++ , Arm Assembly , 64 bit Arm CPU architecture. Experience in Firmware Development under Bare Metal/Linux Environment and Debugging on SoCs for embedded Applications Understanding of SSD controller is preferred Experience in interfaces like NAND/PCIe/NVMe/DDR is a plus Good communication skills in English, written and spoken. Candidate should be flexible, proactive and have the ability to work in a team Should be able to work on a given task independently Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-CP1

Greetings from HCL Technologies...! Experience- 5 to 12 Years Location- Bangalore/Chennai Job Description: Work on key components of functional validation of complex ASIC SOC blocks on Emulation / HAPS / Post silicon platforms Experienced in one or more of following protocols Ethernet 802.3 protocols/IP, L2/L3, PCIE, DDR/HBM, ARM/RISC-V based CPU SS, USB, Audio & DSP, AI accelerators etc. Perform Pre/Post-Silicon test content and test plan development. Regress test plan execution and infrastructure development for functional validation of complex design. Creating stress and performance scenarios to meet test plan goals. Debug failures Experienced with Source and Version Control management (GIT/Perforce/CVS etc.) Innovate to improve validation efficiency through methodologies and tools Skills: Hands on experience with C/C++ and Python is must to have. Familiarity with boards, components, memories, industry standard interfaces like Ethernet, PCIE, DDR, HBM, USB, JTAG , I2C and UART protocols . Creativity, verbal and written communication skills, analytical and problem-solving ability.

We are seeking highly motivated DFT engineer to be part of Hardware team. Join a great team of engineering professionals who are involved in development, validation, and delivery of DFT patterns for IBM’s microprocessor chip design team. As a member of functional DFT team ( Power on Reset, Architecture Verification Program, Array BIST teams ), you will be required but not restricted to pattern generation, simulation, validation, characterization, delivery to TAE, IBM’s Hardware Bring-up and Silicon Debug Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 5-9 years experience in DFT on complex designs involving scan insertion, compression, MBIST, ATPG, simulations and IP integration and validation.Proven expertise in analysing and resolving DRCs/TSVs .Hands-on experience in pattern generation for various fault models, pattern retargeting and debugging techniques to address low coverage issues.Hands-on experience with Gate-Level DFT verification, both with and without timing annotations.Well versed with industry standard test techniques and advanced DFT features like SSN, IJTAG, IEEE 1500, Boundary scan , LBIST and STA constraint delivery .Hands on experience on industry standard tools used for DFT featuresProficiency in scripting languages such as TCL, Perl or Python to automate design and testing tasks.Worked with cross functional teams like design, STA & tester teams for ensuring top quality of DFT deliverables and DFT support and hand offs.Excellent analytical and problem-solving skills, with a keen attention to detail.Strong communication and collaboration skills, with the ability to work effectively within cross-functional teams Fundamentals in micro controller architecture, embedded firmware, functional verification and RTL design * Experience working with ATE engineers for silicon bring up, silicon debug and validation. * Experience in processor flow and post silicon validation Preferred technical and professional experience Hiring manager and Recruiter should collaborate to create the relevant verbiage.

Job Details: : 1) Defines, develops, and performs functional validation in SoC power management for GPUs focusing on validation of IP integration, interaction between IPs, and system level features.2) Applies various hardware and software level tools and techniques to ensure validation coverage and that performance, power, and area goals are met. 3) Reviews proposed design changes to assess impact on validation plans, tasks, and timelines. 4) Develops Power Management validation methodologies and Validation plans for SoC power management for GPUs, executes validation plans, and collaborates with engineers for feature verification, troubleshooting and failure analysis. 5) Tests interactions between various GPU features using validation infrastructure. 6) Develops post silicon validation infrastructure (e.g., performance monitors, behavioral checkers, state space coverage) and test environment used in validation testing. 7) Performs silicon debug to identify root causes and resolves all functional and triage failures for SoC Power management in GPUs. 8) Develops content to create or increase specific IP interactions, engages in all phases of the product life cycle and develops and validates content, infrastructure, and bug hunts in multiple environments (emulation, FPGA) to ensure silicon readiness Qualifications: Bachelors or masters degree in computer science, Electrical Engineering, or a related field with 5 to 10 years of experience. Proven experience in SoC validation specifically in Power management areas Test content development with focus on reset/boot/Active Power/Idle Power/ Thermal areas. Strong understanding of server architectures, hardware components, and operating systems (Windows, Linux) Proficiency in programming like C, C++, Python for test automation, debugging, and test content development. Experience with validation, debug tools involving ITP/JTAG, Test content development tools and frameworks (e.g., Jenkins, GDB, WinDbg). Excellent problem-solving skills and attention to detail. Familiarity with version control systems (e.g., Git) and issue tracking tools (e.g., JIRA). Knowledge of industry standards and best practices related to server reset, platform validation, debugging, and test content development. Good team player, Candidate should have excellent interpersonal skills / strong communication and collaboration skills w/ the ability to work effectively in team environment Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. *

Job Area: Engineering Group, Engineering Group > Hardware Applications Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Application Engineer, you will provide technical expertise of hardware through trainings, product demonstrations, and the design, debug, test, and quality support of customer products. Qualcomm Hardware Application Engineers collaborate with cross-functional teams to assess the potential application of company products that meet and exceed customer needs. Minimum Qualifications: "¢ Bachelor's degree in Electrical/Electronics Engineering, Computer Engineering, or related field and 2+ years of Hardware Applications Engineering or Hardware Design experience or related work experience. OR Master's degree in Electrical/Electronics Engineering, Computer Engineering, or related field and 1+ year of Hardware Applications Engineering or Hardware Design experience or related work experience. OR PhD in Electrical/Electronics Engineering, Computer Engineering, or related field. IOT JD Title IOT Applications Engineering "“ Senior Engineer Job Function Qualcomm is seeking candidates to assist its customers in designing IoT solutions utilizing Qualcomm hardware and software. The individual will contribute to the dynamic Customer Engineering team for product designs and will be responsible for supporting Qualcomm's expanding portfolio of platforms and applications. This role involves collaborating closely Qualcomm customers to support hardware design sign-offs, system/PCB/chip-level debugging, and ownership of design collaterals that helps customers to bring out products faster. Preferred Qualifications A strong understanding of Digital/baseband HW design and PCB design is required. Good troubleshooting skills with the ability to analyze and debug during board bring up (boot-up) are essential. An understanding of LDO/SMPS is essential, along with experience in power management for portable devices being advantageous. Solid knowledge in High-Speed digital interfaces, such as memory Bus I/F (UFS, eMMC, LPDDR, NAND), Display interfaces (parallel and serial, preferably MIPI DSI), Camera interfaces (parallel and serial, preferably MIPI CSI), High Speed peripherals (USB, SDC, PCIe, Ethernet), and Standard Peripheral interfaces (UART, SPI, I2C, JTAG, HDMI) are necessary. Experience with Digital HW/baseband systems and board-level design, as well as familiarity with Digital ASICs and system design, is important. Understanding of system-level clocking schemes, interface-level handshakes are necessary A strong understanding of mobile and consumer electronics products is needed. Hands-on experience with oscilloscopes, logic analyzers, test and measurement tools are required. Basic knowledge of ARM processors and experience with JTAG emulators, display drivers, and memory is preferable. Knowledge of multi-core system/inter-chip system design is advantageous. A strong understanding of PCB signal/power integrity is necessary Must be comfortable in reviewing schematics and suggesting improvements is required. Experience with schematic entry is a plus. Must have knowledge to review PCB layout in various CAD tools like Cadence Allegro, Siemens Mentor Graphics suite. Knowledge of multi-layer PCB designs, vias, and stack-up configuration is essential. The ability to interact with multi-geography customers and stakeholders is desired. Knowledge of prototyping platforms like Arduino and Raspberry Pi is beneficial. About The Role As a member of Qualcomm's Customer Engineering team, responsibilities include creating chip and chipset documentation, reference schematics, and training materials for global customer support. Candidate will assist with hardware design reviews, respond to technical queries, and troubleshoot designs at the system, SoC, and PCB levels. A minimum of 3 years' relevant experience is required, along with skills in hardware, digital/high speed/power management, and Silicon validation. Keywords Board Design, Board bring up, UFS, LPDDR, NAND, eMMC, MIPI, USB, UART, SPI, I2C, Logic Analyzer, PADS, Allegro, LDO, SMPS, Clocks, Crystal, ARM processor, JTAG Educational Requirements RequiredBachelor's, Electronics and/or Electrical Engineering PreferredMaster's, Electronics and/or Electrical Engineering

Job Area: Engineering Group, Engineering Group Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.Qualcomm's SoC Validation Team (SVE - System SOC/silicon Validation) is part of the central SoC digital hardware organization responsible for the overall quality of the SoC silicon. The Validation team works closely with architects, designers, verification engineers, software engineers, and customers.We are looking for self-motivated engineers who will be part of bare-metal SoC validation team and will have the following responsibilities. Responsibilities Design, develop, debug system/IP validation framework to be used in bare-metal and light-weight-RTOS environment for SoC validation in one of the areas mentioned below Understand the SoC architecture, new features and prepare test plan Develop/port/enhance system validation content based on system level use cases, low power use cases, find HW bugs and root cause them Interface with Design/Verification/Software/Customer Engineering teams for test plan and debugs Interface with various IP validation team and cross functional teams(Design/Verification/SW) for test plan creation and debug complex issues Use silicon debug hooks to measure power/performance/coverage and other KPI metrics Manage a team of silicon validation team members Minimum Qualification : Bachelor's/Master"s degree in Electronics and Communication Engineering/Computer Science or related field 11+ years of working experience in SOC validation (Candidates with less experience with good academics from premier institutes can also be considered) Mandatory Skills: Good knowledge and understanding of Embedded SW architecture and development in C, C++, Assembly C language expertise for low level programming, assembly language for any processor, C-assembly interworking Hands on end to end experience in one or more of the IP validation flow from architecture review, testplan creation, testcases development, execution, debugsCPUSS, DDRSS, Multimedia (Camera, Video, Display, GPU) blocks Good Experience in working closely with Design/Verification/Arch/Customer Engineering teams for IP/SOC validation planning, execution and debugs Good knowledge of ARM/X86/PowerPC CPU architecture, Interrupt handling, Cache coherency, IO Coherency Good knowledge of SoC architecture having Multicore/Multiprocessor with SMP/heterogenous cores, memory management, CPU concepts Having experience of managing team members as people manager Compiler/LinkerProficient in using compilers and linkers such as GCC, CLANG, RVDS, LLVM, Experience in optimizing code and resolving linker issues to ensure efficient and error free builds Experience in using JTAG interfaces and tools for debugging SOC/silicon design issues Scripting languages such as Python, shell scripting etc. Desired Skills Exposure to SoC architecture paradigms " interconnects, power management, emulation(pre-Si) environment Exposure to working on emulation/pre-si environment is added advantage Experience working with boot code for ARM processors Knowledge of Operating systems/RTOS/Linux kernel internals, multithreading, scheduling policies/locking mechanism, Virtual memory/MMU/paging etc Software development for silicon enablement, silicon validation, design issue debugs Board Bring-up/Bring-up of hardware-software solution on FPGA/emulation platforms and on fresh SOC designs Exposure to build automationExperience with build automations tools such as Jenkins and experience in creating automated build pipelines to stream line the development process Exposure to Regression testingUnderstanding of the regression testing methodologies and tools. Ability to design, implement and execute comprehensive regression test suites to ensure software quality and stability Code ReviewsAbility to conduct thorough and constructive code reviews to maintain code quality, ensure best practices and identify the areas of improvements