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Silicon Low Power Design Verification Engineer

Silicon Low Power Design Verification Engineer

Google

4 - 9 years

25 - 30 Lacs

Bengaluru

Posted:1 day ago| Platform:

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Skills Required

Design verification Electrical engineering Power management Computer architecture Silicon System verilog UVM Testing

Work Mode

Work from Office

Job Type

Full Time

Job Description

Minimum qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
4 years of experience with Power Management.
4 years of experience with SystemVerilog, Design Verification Test, Universal Verification Methodology.

Preferred qualifications:

Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience with Interconnect Protocols (eg. AHB, AXI, ACE, CHI, CCIX, CXL).
Experience in low-power design verification.

About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

Verify designs using verification techniques and methodologies.
Work cross-functionally to debug failures and verify the functional correctness of the design.
Provide test plans, including verification strategy, environment, components, stimulus, checks, and coverage, and ensure documentation is easy to use.
Develop cross language tools and verification methodologies.
Create and enhance constrained-random verification environments using SystemVerilog and UVM.

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Silicon Low Power Design Verification Engineer