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Senior Design Verification Engineers

Senior Design Verification Engineers

10 - 15 years

|

10 - 14 Lacs

Bengaluru / Bangalore Karnataka India

Posted:2 weeks ago| Platform: Foundit logo

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Skills Required

Uvm MSEE BSEE RTL Coding

Work Mode

On-site

Job Type

Full Time

Job Description

What You ll Need: MSEE or BSEE with 10+ years of digital design and verification experience. Strong understanding of verification methodologies like System Verilog and UVM. Familiarity with RTL coding and design principles. Proficiency in scripting languages like Perl and Python for automation. Excellent debugging and troubleshooting abilities. Experience with test chip and full chip knowledge is an advantage. Proven leadership and team-building skills.

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Synopsys

www.synopsys.com

Software Development

Sunnyvale California

10001 Employees

617 Jobs

Key People

Aart de Geus

Co-CEO and Chairman
Chi-Foon Chan

Co-CEO and President
Sanjay Balakrishnan

Chief Financial Officer

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