20.0 - 25.0 years

5 - 7 Lacs

bengaluru, karnataka, india

On-site

What You ll Need: MSEE or BSEE with 20+ years of digital design experience. 15+ years of digital and/or physical design experience, including hands-on contributions. Strong understanding of digital design and architecture, physical implementation flows, and timing signoff. Experience with low-power design techniques at RTL and design implementation flow. Proficiency with EDA tool flows and advanced node challenges at 5nm and below. Expertise in developing timing constraints and UPF for power, timing, and area optimization. Excellent software and scripting skills (Perl, Tcl, Python).

Posted 3 weeks ago

Apply

Staff HW Engineer Trend Micro Singapore

8.0 - 12.0 years

8 - 12 Lacs

, United States of America (USA)

On-site

Responsibilities: Full EE Design ownership for assigned systems or subystems from concept to production (Schematic Design, PCB Stackup Design, Layout Guidance, Layout Simulations, HW Bring-Up, Characterization, Functional & Stress Testing, Release to Production) Debug / Troubleshoot complex design issues with systems in development as well as currently shipping systems, with an emphasis on root-cause-analysis. Attends functional and cross-functional team meetings. Provides regular detailed progress reports to management Qualifications: MSEE with 8+ years or BSEE with 10+ years of hardware development experience. Proven track record of successfully bringing designs from concept to production....

Posted 1 month ago

Apply

ASIC Engineer Staff Juniper Networks

10.0 - 15.0 years

4 - 8 Lacs

Bengaluru, Karnataka, India

On-site

Job description You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites. Architect and Develop block level verification environments for sub-system and fullchip using System Verilog and UVM methodology. (30%) Define, architect, code, and deliver verification suites/tests for ASICs that enable faster, denser, feature-rich systems. Use various front-end simulator tools (VCS/NC) to perform this activity. (25%) Verify large ASIC blocks independently and rapidly and sign off them for tape-out with analysis of code coverage, functional coverage and Gate level simulation. (30%) Work closely with logic designers to resolve bugs and softwar...

Posted 1 month ago

Apply

ASIC Digital Design, Staff Engineer Synopsys

4.0 - 9.0 years

5 - 7 Lacs

Hyderabad / Secunderabad, Telangana, Telangana, India

On-site

What You ll Need: BSEE or MSEE with a minimum of 4 years of experience in digital design and front-end flows. Proficiency in running lint/cdc/rdc checks and synthesis flow. Experience in coding, verifying verilog and system verilog design. Experience of working with minimum supervision and owning and delivering for Front end activities in IP/SOC Experience of leading technically for Front end activities. Knowledge of digital design methodologies, DFT insertion, synthesis constraints, and flows. Scripting experience in Shell, Perl, Python, and TCL (preferred).

Posted 3 months ago

Apply

ASIC Digital Design, Staff Engineer - RTL Design Synopsys

4.0 - 9.0 years

5 - 7 Lacs

Bengaluru / Bangalore, Karnataka, India

On-site

Posted 3 months ago

Apply

Senior Design Verification Engineers Synopsys

10.0 - 15.0 years

10 - 14 Lacs

Bengaluru / Bangalore, Karnataka, India

On-site

What You ll Need: MSEE or BSEE with 10+ years of digital design and verification experience. Strong understanding of verification methodologies like System Verilog and UVM. Familiarity with RTL coding and design principles. Proficiency in scripting languages like Perl and Python for automation. Excellent debugging and troubleshooting abilities. Experience with test chip and full chip knowledge is an advantage. Proven leadership and team-building skills.

Posted 3 months ago

Apply

Start Your Job Search Today

Browse through a variety of job opportunities tailored to your skills and preferences. Filter by location, experience, salary, and more to find your perfect fit.