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Senior Design Engineer

12 - 16 years

40 - 45 Lacs

Posted:2 months ago| Platform: Naukri logo

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Job Type

Full Time

Job Description

In this position, the candidate will be responsible for design of soft IP cores for Intel's next generation chips (including SOCs) for the different market segments.The engineer will be responsible for the execution and quality of at least 2 IPs and will sign off all design checks and interact with SOC for all integration issues Qualifications Qualification : Master of Science (or a Master of Technology) degree in Electrical Engineering with more than 12 years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than 14 years of relevant industry experience. Experience : Relevant ASIC design/ validation experience in front end processes including RTL development, functional and performance verification. Expertise in design, development and integration of design blocks (IP) for system-on-chip (SoC) components Expertise in verilog and system verilog based logic design. Experience in all design tools like linting, DC, CDC, LEC. Experience in one/more of the following areas PCI_Express, USB, SATA, SDIO,MIPI and /or AMBA standards (OCP, AXI, AHB etc..). Knowledge of SVA. Knowledge of RAS domain is a bonus. Knowledge of considerations for performance, power and cost optimization is desirable .

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Intel
Intel

Semiconductors

Santa Clara

110,600 Employees

303 Jobs

    Key People

  • Pat Gelsinger

    Chief Executive Officer
  • David Zinsner

    Chief Financial Officer

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