Principal/Staff Circuit Engineer - PMIC/Clock IC

Job Summary

Responsibilities

• Lead the design and development of power management circuits, including voltage regulators, DC-DC converters ( PWM/PFM), and LDOs ( Ultra-lownoise/Capless/Fast-transient architecture etc).
• Design and implement high-performance PLL circuits for frequency synthesis and clock generation.
• Conduct detailed circuit simulations and analysis to optimize performance and ensure design robustness.
• Collaborate with layout engineers to guide physical design and ensure optimal circuit performance.
• Perform lab testing and characterization of power management and PLL circuits.
• Mentor junior engineers and provide technical guidance and support.
• Participate in the definition of product specifications and system-level requirements.
  

Qualifications

• Bachelor's or Master's degree in Electrical Engineering or related field.
• 10+ years of experience in power management and PLL circuit design.
• In-depth knowledge of analog and mixed-signal circuit design principles.
• Strong understanding of power electronics and control systems.
• Proficiency in using circuit simulation tools (e.g., Cadence, Spectre).
• Experience with lab equipment for circuit testing and characterization.
  

• Bangalore, Karnataka, India