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5.0 - 9.0 years
0 Lacs
hyderabad, telangana
On-site
As a semiconductor design engineer at Micron Technology, you will be responsible for designing, implementing, and enhancing complex analog circuits in advanced semiconductor process nodes for cutting-edge DRAM products. Your role will involve integrating modules with the power delivery network, proposing design solutions for optimal performance, and driving innovation for future memory generations in a dynamic work environment. You will validate and optimize designs for reliability, conduct EM/IR simulations, and optimize layouts to achieve the best circuit performance. Additionally, you will be involved in custom digital circuit design and validation, parasitic modeling, design validation, reticle experiments, and tape-out revisions. Your responsibilities will also include overseeing the layout process, performing verification processes using industry-standard simulators, and contributing to cross-group communication to drive standardization and group success. Collaboration with various teams such as Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering will be essential to ensure the accurate manufacturability of products. You will proactively seek guidance from Standards, CAD, modeling, and verification groups to enhance design quality and overall project success. Micron Technology, Inc. is a global leader in memory and storage solutions, committed to transforming how information is used to enhance life for all. With a focus on customer satisfaction, technology innovation, and operational excellence, Micron delivers high-performance DRAM, NAND, and NOR memory and storage products through its Micron and Crucial brands. The innovations created by Micron's team enable advancements in artificial intelligence and 5G applications, driving opportunities in data centers, intelligent edge computing, and client and mobile user experiences. For more information about Micron Technology and career opportunities, please visit micron.com/careers. If you require assistance with the application process or need reasonable accommodations, please contact hrsupport_india@micron.com. Micron Technology strictly prohibits the use of child labor and adheres to all relevant laws, regulations, and international labor standards.,
Posted 4 days ago
5.0 - 8.0 years
4 - 8 Lacs
Bengaluru, Karnataka, India
On-site
THE ROLE: This job opening is for a circuit designer in a team responsible for high-precision custom circuit blocks in AMD's microprocessor designs. This team owns a wide variety of key IP in Digital and Analog/Mixed-Signal domains catering to products across multiple business units. With a good mix of experienced designers and recent college graduates from top Engineering institutions across the country, this team offers a very competitive atmosphere with excellent scope to learn and improve. Meticulous execution routine resulting in a solid track record, a strong focus on innovation and a balanced work-life distribution makes this one of the top-class teams in this space across the industry. THE PERSON: Ideal candidate would be the one with not only strong circuit design knowledge, but also clear communication and presentation skills along with diligent documentation of work. Passion to go beyond the call of duty and innovate for higher efficiency would be a key differentiator. KEY RESPONSIBILITIES: Complete ownership of analog mixed-signal circuit blocks in CPU/GPU designs in cutting edge FinFet technology nodes Responsible for circuit design, layout quality, electrical and timing analysis, and reliability checks Interface with cross-functional teams like RTL, Verification and Physical Design PREFERRED EXPERIENCE: Strong hands-on experience in relevent analog circuits including LDO, Bandgap, ADC, DAC, PLL, etc. in latest technology nodes, including Finfet Knowledge of Ultra-Fast Transient Regulators, On-Chip Power Distribution and PDN Modeling Good technical knowledge of power-performance trade-offs in the designs Direct experience in all phases of design analysis including functional, static timing and electrical sign-off ACADEMIC CREDENTIALS: Desired: Masters in Electrical/Electronics Engineering, with specialization in microelectronics or something similar
Posted 1 week ago
5.0 - 9.0 years
0 Lacs
hyderabad, telangana
On-site
The ideal candidate should possess experience in Analog and Mixed Signal Design, focusing on PMIC blocks such as DC-DC converter (BUCK, BOOST), LDOs, and clocking circuits. A strong foundation in CMOS design and active filter design is essential for this role. Responsibilities will include circuit design, validation, mixed signal validation, and reliability validation. Exposure to PMIC designs, high-speed digital circuit design, and analysis with timing and flow closure is required. Additionally, knowledge of digitally assisted analog circuits and techniques is preferred. The candidate will be entrusted with developing high-speed, low-power, and reliable analog and digital circuits for various PLL areas. Proficiency in control systems, Bandgap reference, bias, op-amps, feedback, and compensation techniques is necessary. Joining an expanding analog/mixed-signal circuit design team involved in cutting-edge foundry process development nodes, the selected candidate will be expected to focus on Analog blocks and clocking circuits. Proficiency in CMOS design, passive RC circuits, and switched-cap circuits is crucial for success in this role. Task responsibilities will encompass circuit design, validation, mixed signal validation, and reliability validation. Additionally, the candidate should be adept in high-speed digital circuit design and analysis with timing and flow closure, as well as digitally assisted analog circuit and techniques. The role will involve the development of high-speed, low-power, and reliable analog and digital circuits for various PLL areas, requiring a good understanding of control systems, band gaps, bias, op-amps, LDOs, feedback, compensation techniques, as well as experience in LC VCO/DCO design. Exposure to VCO performance parameters and complete PLL architecture is highly desirable.,
Posted 1 week ago
5.0 - 10.0 years
25 - 40 Lacs
Pune, Ahmedabad, Chennai
Work from Office
Job Title: AMS Layout Design Engineer Job Description 90/130/150nm and higher node with PMIC layout experience. Performs layout and takes corrective actions in such a way that the final result meets all requirements as stated in the Design document, section layout, including all remarks from review, the customer and back annotation. Performs layout in such a way that the final result meets all general layout guidelines and matches 1-to-1 with parameter devices and hierarchy used in simulations. Create floorplan Performs DRC and takes corrective actions if needed until DRC is error free Performs LVS and takes corrective actions if needed until result is successful Performs layout in such a way that final result meets the foundry layout rules. Provides extracted netlist for back annotation to DE as specified in the Design document, section layout. Translates sub block schematics to sub block layouts, taking care of the same hierarchical build-up and respecting the guidelines of the Block review document, section layout. Adds extra useful information to the Block review document, section layout.
Posted 1 month ago
7.0 - 10.0 years
20 - 35 Lacs
Bengaluru
Hybrid
Requirement : Analog Circuit Design Lead Experience Range : 7 - 12 Yrs. Work Location(s) : Bengaluru, Karnataka Candidates who are ready to join Immediately Requirements: Experience in entire Analog IP development including circuit design, layout, AMS verification, and characterization. Must have led the entire Analog IP development cycle and team. Circuit Design implementation of IPs including LDOs, Band Gap reference, Current Generators, POR, ADC/DACs, PLLs, Oscillators, General Purpose IOs, Temperature sensor, SERDES, PHYs, Die to Die interconnect, High-speed IOs, etc. Analog/custom layout design in advanced CMOS process. Ability to understand design constraints and implement high-quality layouts. Conceptualize and implement chip-level mixed signal simulation environments (testbenches, run scripts, etc...). Characterization . Hands-on experience on lower FINFET technology nodes and design/PPA trade-offs
Posted 2 months ago
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