8 Mentor Calibre Jobs

Analog / Custom Layout Design Engineer (TSMC 3nm | FinFET | Cadence | Calibre) Experience: 4 to 8 Years Location: Hyderabad Job Description: We are seeking a highly skilled Analog / Custom Layout Design Engineer to drive the design and development of critical analog, mixed-signal, and custom digital layouts , supporting full-chip level integration in advanced FinFET process technologies. You will be responsible for end-to-end layout execution from schematic translation and floor planning to verification and final sign-off — while collaborating closely with circuit designers, verification engineers, and project leads. Key Responsibilities: Design, develop, and implement analog, mixed-signal, ...

Experience in Cadence digital design tools as Innovus, Tempus, QRC, Voltus, Genus, Conformal LEC Physical Verification with Mentor Calibre or Cadence PVS tools. Exposure to Low-power design and UPF methodology. Required Candidate profile Notice Period (Availability) - Immediate to 15 Days. Good knowledge of TCL Shell PERL Python Scripting.

ANALOG LAYOUT ENGINEER An experienced Analog Layout design engineer should be innovative, collaborative, meticulous, and curious. KEY RESPONSIBILITIES: Layout of basic digital and analog building blocks using analog transistor level components. Layout of analog macros, power pads, and input/output pads using above blocks Working closely with Analog designers in floorplanning; power grid and signal flow planning Physical and electrical verification include DRC, LVS, EM/IR, ERC, PERC Latch up and PERC ESD Creation of blackbox models for other groups in the design flow PREFERRED EXPERIENCE: Must have detailed knowledge of CMOS circuit theory. Must have ability to communicate with various teams ...

Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world's leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwid...

As an experienced Analog Layout design engineer, you are expected to be innovative, collaborative, meticulous, and curious. Key Responsibilities: - Layout of basic digital and analog building blocks using analog transistor level components. - Layout of analog macros, power pads, and input/output pads using the above blocks. - Working closely with Analog designers in floorplanning; power grid and signal flow planning. - Physical and electrical verification include DRC, LVS, EM/IR, ERC, PERC Latch up, and PERC ESD. - Creation of blackbox models for other groups in the design flow. Preferred Experience: - Must have detailed knowledge of CMOS circuit theory. - Must have the ability to communicat...

You should have a Bachelor's or Master's degree in Engineering with 3 to 5 years of experience in Physical verification at block-level and chip-level. You must have expertise in DRC, LVS DFM, Antenna, Density Fill Routines, and other Tape-out sign-off processes. Proficiency in using Synopsys ICC Tool is required, along with tape-out experience of multiple complex chips at 14 nm or below. You should be familiar with Mentor Calibre or Synopsys ICC and ICV tools and have programming skills in tcl, Perl, or C. In this role, you will be responsible for planning and addressing electrical considerations like EM, IR, Noise, etc., throughout the design process. Exposure to physical verification flow ...

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and meticulous engineer with a deep commitment to excellence in analog and high-speed mixed signal layout design. With a minimum of 2 years of hands-on experience in advanced technology nodes (5nm and below), you thrive in dynamic, collaborative environments w...

Our creative and versatile Physical Design team in Bangalore, India. As a member of our physical verification team, you will perform various types of physical verification checks (such as LVS, DRC, design-for-manufacturing, design-for-yield, design-for-reliability and lithography) at the chip and block level. You will collaborate with the CAD, Foundry Operations teams for flow bring up and validation. We work directly with the implementation team during the entire chip design cycle to drive signoff closure for tapeout. You will lead schedules and support cross-functional engineering efforts. You'll work on pad ring, bump, RDL design, and working with the package and floorplan teams. Technica...