Memory Layout Engineer

As a Memory Layout Engineer at our company, you will play a crucial role in designing and integrating layouts for advanced memory blocks across leading-edge process technologies. Your primary responsibilities will include: - Designing layouts for essential memory components such as Control and Digital logic, Sense amplifiers, Bit-cell arrays, and Decoders. - Working with advanced process nodes like 16nm, 14nm, 10nm, 7nm, 5nm, 3nm, and FinFET technologies. - Developing memory compilers, addressing layout-related issues, and ensuring optimization. - Proficiency in Routing Congestion, Physical Verification in Custom Layout. - Knowledge of verification checks like DRC, LVS, ERC, Antenna, LPE, DFM, etc. - Understanding of analog layout techniques and circuit principles affected by layouts. You should have hands-on experience with industry-standard layout and verification tools in a Linux environment, including Cadence and Mentor EDA tools. Proficiency in VirtuosoXL is a plus. Additionally, you are expected to demonstrate leadership skills to mentor and guide team members in layout execution, along with excellent communication skills and a proactive work approach. Qualifications required for this role include a BTECH/MTECH degree and a minimum of 3+ years of experience in memory layout design. This position is based in Bangalore, Hyderabad, or Noida. Joining our team will give you the chance to work with cutting-edge technologies and collaborate with a team of experts. If you are passionate about memory layout design and thrive in an innovative environment, we welcome you to apply for this exciting opportunity.,