Manager Silicon Design Engineering

Key Responsibilities

• Lead and manage

  a team of design verification engineers, providing technical direction, mentorship, and performance feedback.

• Define and drive verification strategy

  for Data Fabric IP, ensuring alignment with architectural goals, schedule, and quality targets.
• Oversee

  test plan creation, review, and execution

  for block- and system-level verification.
• Ensure

  functional and code coverage closure

  , and track verification quality metrics for all deliverables.
• Collaborate with

  design, architecture, and performance engineering teams

  to resolve complex technical issues and optimize verification approaches.

• Prioritize and allocate resources

  across multiple verification tasks and projects, balancing execution speed with quality.

• Champion verification methodology improvements

  , automation initiatives, and best practices across the team.
• Support

  post-silicon debug efforts

  , helping to recreate and root-cause lab or customer-found issues.
• Represent the verification team in

  project reviews, planning meetings, and executive updates

  .

Required Skills & Experience

• Proven track record of

  leading ASIC or SoC design verification teams

  through successful product tape-outs.
• Strong expertise in

  SystemVerilog, UVM, and coverage-driven verification methodologies

  .
• Deep understanding of

  computer architecture

  , digital logic design, and high-speed interconnect/fabric protocols.
• Hands-on experience with

  EDA tools

  (Synopsys VCS, Cadence Xcelium, Mentor Questa).
• Excellent

  debugging and problem-solving skills

  for complex, multi-clock domain designs.
• Scripting proficiency in

  Python, Perl, or similar

  for automation and regression management.
• Strong

  people management and communication skills

  to lead geographically distributed teams.

Preferred Background

• bachelors or masters degree

  in Electrical Engineering, Computer Engineering, or related field.
• 10+ years of experience in ASIC/SoC verification, with at least

  3+ years in a management or technical leadership role

  .
• Experience working with

  multi-site, cross-functional teams

  in a fast-paced semiconductor environment.
• Familiarity with

  formal verification

  and emulation/prototyping flows is a plus.