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Lead STA Engineer(7-12 Years)

7 - 12 years

35 - 60 Lacs

bengaluru

Posted:None| Platform: Naukri logo

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Skills Required

static timing analysis sign-off analysis static timing closure sdc constraints eco timing fixes path debugging

Work Mode

Hybrid

Job Type

Full Time

Job Description

Position:

About the Role

Key Responsibilities

  • Lead and mentor a team of STA engineers, providing technical direction, task allocation, and performance feedback.
  • Own

    cluster-level STA sign-off

    , including setup/hold, clock skew, jitter, crosstalk, and OCV analysis.
  • Develop and validate

    SDC constraints

    and timing methodologies for multiple functional and test modes
  • Collaborate closely with Physical Design, RTL, and DFT teams to achieve timing closure.
  • Drive

    ECO implementation

    for timing fixes without impacting functionality.
  • Interface with EDA vendors to resolve tool and flow issues.
  • Ensure delivery schedules are met with high-quality, sign-off-ready timing reports.
  • Contribute to timing methodology improvements and automation for enhanced productivity.

Required Skills & Experience

  • 7+ years of hands-on STA experience
  • Strong command over

    PrimeTime

    or

    Cadence Tempus

    and SDC constraint development.
  • Deep understanding of

    multi-mode, multi-corner (MMMC) analysis

    .
  • Proven experience in

    ECO flow

    and debugging complex timing paths.
  • Strong leadership, mentoring, and cross-functional coordination skills.

Preferred Qualifications

  • Exposure to

    high-performance computing, AI, or networking SoCs

    .
  • Familiarity with

    power-aware STA

    and UPF/CPF flows.
  • Experience in developing STA automation scripts (Tcl/Perl/Python).

Why Join Us?

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