Memory Design Engineer

Role & responsibilities

• Design highly competitive circuits to meet performance/power specifications requested by customers
• Guide and lead a group of engineers to deliver the SRAM IP in the given timelines
• Analyze circuits and identify potential robustness gaps and find solutions to improve robustness of the design.
• Own the responsibility from SPEC to GDS and DK delivery.
• Review circuits, robustness reports and identify potential robustness issues.
• Review Layouts and suggest improvement areas to achieve competitive PPA
• Understanding of SRAM PPA trade-offs and identify right techniques to meet SPEC
• Must be able to communicate effectively across different teams.

Preferred candidate profile

• Master/Bachelor in electronics
• Working experience (2 to 15 years) in preferably Memory design
• Understanding of RC network and finfet fundamentals are necessary.
• Custom or Compiler SRAM/ROM development experience
• Fundamentals of process variability and its effect on memory design
• Thorough understanding of SRAM bit cell and its characteristics (Read current, Standby current, data retention, SNM)
• Strong understanding of circuit design fundamentals
• Critical path modeling concept, various type of models ( RC, C, Pai, ladder)
• Good knowledge of semiconductor physics. Like knowledge of finfet function, parasitic etc
• Analyzing layout and understanding of LLE effects.

Minimum Qualifications:

• Bachelor's /Master degree in Computer Science, Electrical/Electronics Engineering, Engineering and 6+ years of experience in circuit design.