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Eteros Technologies
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Lead STA Engineer

Lead STA Engineer

Eteros Technologies

6 - 8 years

11 - 15 Lacs

ahmedabad

Posted:18 hours ago| Platform:

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Skills Required

sta career development semiconductor static timing analysis soc perl supervision physical design scripting

Work Mode

Work from Office

Job Type

Full Time

Job Description

Good understanding of timing concepts, a good understanding of SDC and constraints syntax, and experience in Timing Analysis both at block level and SoC level.

You must have experience with Industry Timing sign off tools like Prime time / Tempus, DMSA or Tweaker, and MMMC

As a Static Timing Analysis Engineer, you will work with the design and implementation teams to develop and qualify timing constraints, solve timing challenges in Block/SOC by manually closing difficult paths, and work closely with the physical design engineers to resolve implementation-related timing issues.

You should also have a clear understanding of Cross-talk delay/noise, Timing derates, AOCV/POCV concepts, and its impact on design closure.

In addition, you should have experience in Timing & Noise Sign-off Closure at block level or Full chip-level on advanced process nodes, be able to plan and track self-execution, and report results on a regular basis systematically. Hands-on scripting skills on TCL / Perl are a must.

Qualifications:

BTech/MTe ch/PhD with 6-8 yearsexperience in STA

Proven track record with multiple successful final production tape-outs

Be able to work under limited supervision and take complete accountability.

Excellent written and verbal communication skills

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Lead STA Engineer