60 Isa Jobs - Page 2

Choosing Capgemini means choosing a company where you will be empowered to shape your career in the way you’d like, where you’ll be supported and inspired bya collaborative community of colleagues around the world, and where you’ll be able to reimagine what’s possible. Join us and help the world’s leading organizationsunlock the value of technology and build a more sustainable, more inclusive world. Your Role Minimum 3-8 years’ experience assessing against standards and frameworks including one or more of the followingDOE C2M2, IEC-62243/ISA-99, NIST CSF, NERC CIP, etc. Minimum 3-5 years’ experience working with ICS technologies and/or environments on one or more of the followingSCADA, DCS, EMS, DMS, ADMS, PCN, RTUs, IACS, PLCs, HMIs, etc. Minimum 3-5 years working with cybersecurity functions of one or more of the followingvulnerability assessment and management processes, identity and access management, incident response and monitoring, etc. Problem-solving ability and strong analytical skills Experience of working with diverse teams and is a team player Relevant certifications (CISSP, GICSP, GRID, GCIP, etc.). Keep abreast with the latest technology trends and predictions Ability to drive the creation of prototypes and proof of concepts Able to effectively communicate, interact and influence business and operational stakeholders and partners Ability to deliver innovative solutions and consistently demonstrate customer outcomes. Primary Skills DOE C2M2 IEC-62243/ISA-99 NIST CSF NERC CIP

Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. . Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of complete processor pipeline stages. Good understanding of computer architecture, including Processor core design specifications,processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units Experience with high frequency, instruction pipeline designs. At least 1 generation of Processor Core silicon bring up experience. In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages.. Preferred technical and professional experience Knowledge of verification principles and coverage. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. . Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of complete processor pipeline stages. Good understanding of computer architecture, including Processor core design specifications,processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units Experience with high frequency, instruction pipeline designs. At least 1 generation of Processor Core silicon bring up experience. In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages.. Preferred technical and professional experience Nice to haves - Knowledge of verification principles and coverage. - Knowledge of test generation tools and working with ISA reference model. - Experience with translating ISA specifications to testplan. - Understanding of Agile development processes. - Experience with DevOps design methodologies and tools.

Job Title: Audit Quality Assurance Associate Reports to: Audit Quality Assurance Manager Job Location: Ahmedabad Qualification: Chartered Accountant Experience: 1 yr mandatory after articleship Salary: upto 60 K p.m. Mandatory Skills : Quality Assurance Audit Key Responsibilities: 1.Financial Statement Review: Assist in reviewing client financial statements to ensure compliance with applicable accounting and auditing standards. Identify discrepancies, errors, and areas of improvement in audit documentation. 2.Audit Quality & Compliance: Ensure adherence to firm-wide audit policies, procedures, and quality standards. Assist in implementing updates to audit methodologies and best practices. 3.Training & Development Support: Help in developing training materials and conducting audit-related training sessions. Provide guidance to audit teams on technical issues and industry standards 4.Standards Implementation: Stay updated with IFRS, ISA, and other regulatory changes. Support the rollout of new quality control procedures across the firm. 5.Process Improvement: Identify gaps in the audit process and suggest improvements. Collaborate with audit teams to enhance efficiency and documentation quality. Required Qualifications & Skills: Education: CA, CPA, ACCA, or equivalent qualification Experience: 25 years of experience in external audit, financial reporting, or audit quality review. Experience with Big 4 or mid-tier audit firms is a plus. Technical Skills: Strong understanding of IFRS and ISA. Soft Skills: Attention to detail and strong analytical skills. Excellent communication skills for interacting with engagement teams

Role & responsibilities - About the Role: - The Engineering Manager is a senior leadership role responsible for managing all engineering functions related to the execution of multi-disciplinary EPC projects. This includes overseeing engineering design, ensuring technical integrity, driving project efficiency, and aligning engineering outputs with client specifications and industry standards. The role demands strong coordination across mechanical, electrical, instrumentation, civil, and telecom disciplines, with a proactive approach to HSE integration, quality control, and stakeholder engagement. The Engineering Manager acts as the technical authority across projects involving flare systems for refineries, industrial security and telecommunication solutions, and storage tanks, ensuring that engineering deliverables are completed on time, within budget, and to the highest quality and safety standards. - Education: Bachelors degree in mechanical engineering, Chemical Engineering, (masters preferred). - Experience & Requirements: 15+ years of engineering experience, with at least 5+ years in a managerial or lead role within EPC/industrial projects. Strong knowledge of international engineering standards and codes (API, ASME, IEC, ISA, NFPA, etc.). Proven experience in tank farms, vessels, piping, flare systems, and telecom/security systems in oil & gas or industrial sectors. Experience with Gulf region projects and client requirements (e.g., ADNOC, PDO, ARAMCO, KNPC, etc.) is preferred. Familiarity with HAZOP, SIL, QRA studies, and environmental impact assessments. - HSE related responsibilities: Ensure all engineering designs comply with applicable HSE regulations and standards. Integrate HSE principles into engineering design to eliminate or minimize operational risks. Promote a safety-first culture within the engineering team and across project stakeholders. Participate in HAZOP, SIL, and risk assessments, ensuring effective design mitigation strategies. Support the development and implementation of project-specific HSE plans and method statements. Key Responsibilities: Technical & Project Leadership: Lead the engineering design and execution of EPC projects from concept to commissioning. Ensure all engineering compliance with client specifications, industry standards (API, ASME, IEC, NFPA, etc.), and regulatory guidelines. Review and approve engineering deliverables including design documents, datasheets, drawings, BOQs, and technical calculations. Coordinate multi-disciplinary teams across the organization. Assist in the development and implementation of production plans to meet project goals and timelines. Oversee complete engineering life cyclefrom concept and FEED to detailed design and execution support. Provide technical leadership across multidisciplinary teams working on: Flare system engineering Oil & gas process skids Storage tank (API) design Piping and equipment design Collaboration and Communication: Work closely with cross-functional teams, procurement, and construction, to ensure smooth integration of production processes into the overall project plan. Participate in meetings and discussions with clients, contractors, and stakeholders to align engineering activities with project requirements and schedules. Provide technical guidance and support to the leadership and other teams as needed. Project Support: Participate in project planning, ensuring that production activities are integrated into the overall project timeline. Assist in the identification and mitigation of risks that may impact production schedules or costs. Contribute to the preparation and review of technical documentation related to production processes. Quality Assurance: Ensure engineering outputs meet required quality benchmarks and internal standards. Participate in internal and external audits related to engineering activities. Drive continuous improvement in engineering practices, tools, and systems. Team Development & Leadership: Lead, mentor, and develop a team of engineers and designers. Conduct regular performance reviews and identify skill development needs. Foster a high-performance, collaborative engineering environment. Preferred candidate profile

Position: Instrumentation and Controls Engineer; YOE: 10+ Years; Contract:On Contract Role; Location: Bangalore. We re hiring Instrumentation and Controls Engineer for one of our Leading MNC in Oil & Gas to join their growing team. This position is based out in Bangalore. Bachelor s or MS degree in Electrical or Mechanical Engineering or related engineering specialty, or equivalent professional experience; Total Years of Experience -10+ years; Feed , Detail Engineering with ESD testing, offline and online testing, and coordination of activities with/without plant shutdowns Review systems for compliance with company s Industrial Control System Requirements (ICSR).

Bachelors or master s degree in Electronics, Instrumentation, Mechanical etc; Minimum 8-15 years of relevant experience in designing and developing Instrumentation systems and equipment; Proficient in using Instrument design tools and software such as InTools, Instrucal, Conval etc; Good knowledge of codes and standards such as ISA, NEC, IEC, and IEEE; Experience in Field Instrument e.e Control Valve, Flow Measurement, Temperature, Level, Detectors, Analyzers etc. Exposure in Control System Design. Layout and material Take off. distribution, and control systems; Excellent communication and collaboration skills; Ability to manage multiple projects and work in a fast-paced environment.

We are looking for a passionate and detail-oriented Instrumentation Engineer with 2 to 3 years of hands-on experience in designing and estimating electrical and instrumentation systems. The ideal candidate will have expertise in instrumentation for gas-based compressor packages (LNG, CNG, Biogas, Nitrogen), deep familiarity with relevant international standards, and strong technical documentation capabilities. This role demands practical knowledge of hazardous area instrumentation, PLC systems, and control system design. Key Responsibilities: Design & Engineering Design and estimation of power, control, and instrumentation systems for engine/motor-driven compressors across various gas applications (LNG, CNG, Biogas, Nitrogen). Preparation and revision of Piping & Instrumentation Diagrams (P&IDs) using AutoCAD Electrical or Medusa software. Develop detailed engineering documents including: Instrument specifications based on contract and process requirements. Instrument hook-up diagrams and Bills of Materials (BOMs). Junction Box (JB) and Cable Schedules. Cable tray, earthing, and instrument/panel location layouts. I/O lists, Alarm/Trip lists, Logic Diagrams, Loop Diagrams, Control Narratives, and Cause & Effect (C&E) matrices. Systems & Instrumentation Hands-on experience with BN3500 vibration monitoring systems , including the selection of probes, monitoring cards, and configuration. Proficiency in PLC systems (Allen Bradley / Siemens), including programming and troubleshooting. Experience using SPI (SmartPlant Instrumentation) Intools for database-driven instrumentation design. Knowledge of communication protocols such as Modbus, Profibus, and Foundation Fieldbus . Compliance & Standards Selection and specification of instruments for hazardous areas (Zone 1 / Zone 2) based on IEC/ATEX guidelines. Familiarity with international standards such as IEC, ISA, UL, API, NFPA, ISO for instrumentation and control systems. Understanding of control panel design for UL/IEC standards. Project Management & Coordination Preparation of E&I project activity schedules and tracking of engineering man-hours. Participation in HAZOP, SIL studies , and review meetings with clients and consultants. Active coordination with clients, consultants, and suppliers for technical discussions and documentation approvals. Electrical Integration Preparation of motor datasheets and VFD specifications . Knowledge of LT & HT motors and starter types (DOL, Star-Delta, Soft Starter). Integration of electrical and instrumentation components in control systems. Required Skills & Competencies: Strong knowledge of instrumentation systems in hazardous and non-hazardous environments. Excellent command over AutoCAD Electrical / Mechanical . Advanced proficiency in MS Excel for calculations, BOMs, and schedules. Advantageous: Knowledge of EPLAN Software (P8 Professional & Panel Pro) . Strong analytical and problem-solving skills. Effective communicator with ability to collaborate across departments and external teams.

Design & Development of valves . know Valve standards ASME, API, MSS-SP, ISA 3D models and 2D drawings using Solid Works software. Solid work Skill is a must. using FEA (Finite Element Analysis) & CFD (Computational Fluid Dynamics)

Role & responsibilities The ISA (Independent Safety Assessment) Lead Assessor is responsible for leading and managing the assessment of railway systems, ensuring that they meet the highest safety standards and regulatory compliance requirements. Product Certification Management including Quality Surveillance, Inspection, witnessing lab & performance test issuing audit report, documentation review in case of product certification during stage 1 and stage 2. Major Responsibilities Manage and lead independent safety assessment projects, ensuring they are delivered on time, within budget, and meet quality standards. Develop project plans, define scope, allocate resources, and monitor project progress against established objectives and deliverables. Conduct independent safety assessments of railway systems, subsystems, and components in accordance with CENELEC standards (e.g., EN 50126, EN 50128, EN 50129) and relevant safety regulations. Review and evaluate safety-related documents such as Hazard Analyses, Risk Assessments, Safety Cases, and Verification & Validation reports. Assess risks associated with railway system safety throughout the project lifecycle. Additional experience in any one of below Experience in Inspection, Certification & Testing activities minimum as 5 years experience in any of the field as required by certification criteria. Monitoring, coaching and supervising of one or more inspectors. Qualification, Experience & Technical Knowledge (Competency Criteria) The applicant shall be Degree holder from Electrical/Electronics/Electronics and Telecommunication Engineering or equivalent, having at least 5 years in total of work Experience in Inspection, testing witness and Audit activities. Minimum of 20 years of experience in a Railway Safety related role. Technical Expertise: Proven experience with safety assessment methodologies, hazard analysis, and compliance assessments following CENELEC standards (EN 50126, EN 50128, EN 50129). Experience in rail systems: Control Command Signalling, PSD and Rolling Stock. Experience interacting with national safety authorities and regulatory bodies. Knowledge of software safety assessment and cybersecurity in railway applications is a plus. Ensure that the Inspection is carried out as per Inspection test plans and other applicable technical specifications. Skills & Qualities: Excellent interpersonal skills Strong understanding of railway safety system architecture and the interface between the others system (CCS, RS, Infrastructure and energy) including the operations& maintenance safety requirements. Proficient in safety and risk analysis techniques (e.g., FMECA, HAZARD LOG, FTA,). Excellent English verbal and written communication skills for technical report writing and client interactions. Ability to work effectively both autonomously and as part of a team. Preferred candidate profile

India Market UnitSenior Manager- Industry XWork Location:Delhi, Mumbai, Bangalore| Years of experience:12+ years | Entity:India Business |Level:Senior ManagerAccenture Industry XIndustry X combines Accentures powerful digital and AI capabilities with deep engineering,manufacturing, and infrastructure & capital projects expertise. Working across multiple industries, weoffer the broadest suite of services for digitizing R&D, engineering, construction, factory floors, andplant operations; speeding up the transformation of hardware into software-enabled products;reinventing infrastructure & capital projects processes and resulting infrastructure; driving operationalsafety, sustainability and productivity at scale.Using data and technologies such as AR/VR, cloud, AI, 5G, robotics and digital twins, we work withmarket leaders to build resilient and agile businesses that adapt their engineering, infrastructure &capital projects, manufacturing operations in the face of change.Key responsibilitiesDrive client value creation through participating in Industry X related project (DigitalTransformation) deliveries as well as support in end-to-end sales lifecycle (deal origination tosales) Conduct in-depth assessments of client manufacturing/production operations to identify areasripe for Industry X interventions Strong understanding of digital/AI use-cases and impact in manufacturing/productionoperations Analyze client needs and translate them into actionable roadmaps incorporating relevantIndustry X technologies such as IoT, Big Data, Cloud, AI, and Machine Learning. Develop and present compelling business cases highlighting the potential return on investment(ROI) associated with Industry X initiatives. Manage and lead client engagements, ensuring successful project execution within budget andtimelines. Partner with internal and external stakeholders, including technology vendors and systemintegrators, to deliver seamless project implementation. Stay abreast of the latest Industry X trends and technologies, continuously expanding yourknowledge base to provide clients with cutting-edge insights. Establish self as a trusted advisor with the client C-suite through an in-depth understanding ofthe client as well as industry Build networks at Accenture to be able to bring the best of Accenture to the clientQualification Required experienceMinimum 12+ years of experience in management consulting, with a strong track record in oneof the Resources industries such as:o Metalo Miningo Cemento Chemicals Proven experience in successfully leading and managing complex client engagements withinthese industries In-depth understanding of Industry X concepts, technologies (e.g., Industrial IoT, PredictiveMaintenance, Digital Twins), and their application in Production operations. Experience working with Manufacturing Execution Systems (MES), ISA 95 stack and otherrelevant industry-specific software is a plus.Educational qualifications Bachelor's degree in Engineering, Business Administration, or a related field, with a focus inindustrial engineering, manufacturing engineering, or a similar discipline.Whats in-store for youLearn and grow continuously:Build new skills, grow existing skills, develop new areas of expertisewithin functional, technical or industry areas of the business with Accentures unmatched 24/7expert-curated learning boards, webinars and classroom-style training programs Innovate:Get access to resources that will allow you to leverage the latest technologies and bringinnovation to life with the worlds most recognizable companies Thrive and advance:Grow your career as far as your ambitions take you. Truly human:Bring your whole self to a company that aims to be the most diverse in the worldand delivers real-time performance feedback based on your strengths, not stats

PCI Analyst Location-Remote Shift Timings- 11:00 AM IST to 8:00 PM IST The PCI Analyst plays a critical role in ensuring PCI DSS compliance across assigned divisions. This role partners with BISO teams and markets to gather, review, and submit evidence required for PCI assessments. The PCI Analyst maintains ongoing compliance readiness and contributes to the overall compliance strategy by collaborating with assessors and internal teams. Role & responsibilities Assist in planning, coordinating, and executing PCI DSS assessments and audits, including internal assessments and third-party audits. Partner with Brand/Market & BISO teams to gather, validate, and submit evidence for PCI assessments. Work to complete PCI DSS Service Provider and/or Merchant assessments in global markets, including but not limited to the UK, US, and Israel. Ensure ongoing PCI DSS compliance readiness across assigned divisions. Collaborate with internal teams to respond promptly and effectively to assessor requests. Provide guidance on PCI DSS requirements and evidence collection processes. Stay informed of changes in PCI standards and industry best practices and communicate relevant updates to internal stakeholders. Assist with training and awareness initiatives related to payment card security and compliance. Preferred candidate profile Certification as a PCI DSS QSA, AQSA, or ISA. Bachelors degree in Cyber security, Compliance, or a related field. 6-8 years of hands-on experience in PCI compliance or related roles. In-depth knowledge of PCI DSS requirements and compliance frameworks. Strong organizational and collaboration skills, with a focus on accuracy and efficiency. Experience supporting PCI DSS assessments (SAQ or ROC). Knowledge of security controls and technologies (e.g., firewalls, encryption, vulnerability scanning). Industry certifications such as CISA, CISSP, PCI ISA, or CompTIA Security+

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: CPU architecture team is driving the core math libraries needed for ML/AI acceleration. This position/s will expose you to Qualcomms cutting edge SoC and ML/AI platforms in the industry. Participate in Optimizing the core ML kernels using the latest advancements like SME, SVE of the ARM CPU architecture and enhance the performance of the ML models on the CPU of the QCOM Soc Required Skills== 3+ experince with Understanding of ARM CPU architecture fundamentals and ARM Arch64 ISA Optimizing kernels for vector Processors Understanding of the basic linear algebra functions used in AI/ML Algorithm design (logic, critical thinking) Performance Evaluation and Optimization of the applications for ARM architecture Inferencing of the ML models written in Pytorch/TensorFlow/Keras Understanding of the typical Open-Source Library framework design Preferred Skills=== Strong Programming skills and deep understanding of the ARM ISA understanding of the algorithms suitable for Vector and matrix accelerators Strong Analytical and debugging skills Good understanding of Optimizing the Linear Algebra algorithms Performance evaluation using QEMU, Simulators, Emulators and on Real Hardware Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc.

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic unit. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the core level pre-silicon functional & performance verification for our next -generation IBM POWER processor core systems offering. Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the unit level pre-silicon functional & performance verification the Load Store Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for LSU, including the Load and Store pipelines, D-Cache, Address translation, out of order execution of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the architecture, design and development of Processor Core Front end of pipeline units for high-performance IBM Systems. - Architect and design I-Cache, Instruction Fetch, Branch Prediction and Decode units of a high performance processor CPU - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 8 or more years of demonstrated experience in architecting and designing specific CPU unit(eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) - Hands on experience of different Branch Prediction techniques - Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - At least 1 generation of Processor Core silicon bring up experience - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Knowledge of at least one object oriented or functional programming language and scripting language. - Nice to haves - Knowledge of instruction decode and handling pipeline hazards - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Understanding of Agile development processes - Experience with DevOps design methodologies and tools Preferred technical and professional experience Master's Degree/PhD

Lead the unit level pre-silicon functional & performance verification the Load Store Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for LSU, including the Load and Store pipelines, D-Cache, Address translation, out of order execution of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

- Design & specify instrumentation systems for Oil & gas facility including pressure, temperature, flow & level measurement devices - Develop & review P&IDs & control philosophies -Coordinate with DCS/PLC/SCADA systems integration teams. Required Candidate profile -B.E./B.Tech in Instrumentation Engg/Electronics -Proficiency in AutoCAD, SPI (Intools) -Experience in EPC/EPCM oil & gas, Petro-Chemical, Process projects -5 yrs + experience required

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic unit. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Experience 3-6 years Work location: Bangalore Experience in PLC / HMI software development in Discrete Manufacturing domain preferably in Assembly line and packaging machines Expertise in IEC1131-3 PLC programming languages - SFC, FBD, Ladder logic, Structured Text Reading and understanding of customer documents like E-Plan, CTS, 3D Models and wiring drawings Development experience in atleast two of the PLC programming tools like TwinCAT, CODESYS, Simatic STEP 7, RSLogix, IndraWorks Knowledge of Industrial Automation protocols like OPC-DA / UA, Modbus, Profibus Experience in interfacing with external devices like Servo Drives, Motion Controllers, Screwers Hands-on experience in any HMI building tools like Factory Talk View, InTouch, WinCC Experience in commissioning and trouble shooting of Industrial Automation System Good to Have skills: Knowledge of Industrial Automation standards like ISA95, GAMP Any programming language knowledge like .Net C# or Java Experience in implementing any Manufacturing Execution System (MES) UAT (User acceptance Testing) and plant rollouts Roles and Responsibilities PLC programming

Introduction As a CPU Processor Verification Engineer , youll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable customers to make better decisions quicker on the most trusted hardware platform in todays market. Your role and responsibilities Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelors Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic unit. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Introduction As a CPU Processor Verification Engineer , youll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable customers to make better decisions quicker on the most trusted hardware platform in todays market. Your role and responsibilities Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelors Degree Preferred education Masters Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic unit. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Introduction As a CPU Processor Verification Engineer , youll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable customers to make better decisions quicker on the most trusted hardware platform in todays market. Your role and responsibilities Lead the unit level pre-silicon functional & performance verification the Instruction Sequencing Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for ISU which covers the Issue queues, Register Renaming for Out of Order Execution, Issue instructions to Execution Pipelines, Reordering Buffers for completion of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelors Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of Instruction Dispatch verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing Issue Queues, Register renaming and forwarding, Reordering Buffer and Pipeline flush/exception handling etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the core level pre-silicon functional & performance verification for our next -generation IBM POWER processor core systems offering. Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.