Job
Description
You will be responsible for developing the logic design, register transfer level (RTL) coding, and simulation for an IP required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs. Additionally, you will participate in defining the architecture and microarchitecture features of the block being designed. You will apply various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals, as well as design integrity for physical implementation. It will be your responsibility to review the verification plan and implementation to ensure design features are verified correctly. You will also resolve and implement corrective measures for failing RTL tests to ensure the correctness of features. Providing support to SoC customers to ensure high-quality integration and verification of the IP block will also be a part of your role. Furthermore, you will drive quality assurance compliance for a smooth IP SoC handoff. Qualifications: - A Master of Science (or a Master of Technology) degree in Electrical Engineering with more than six years of relevant industry experience, or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than eight years of relevant industry experience. - Expertise in microarchitecture, design, development, and integration of design blocks (IP) for system-on-chip (SoC) components. - Knowledge of power management is preferred, and experience with formal apps would be beneficial. - Expertise in Verilog and System Verilog-based logic design. - Experience in synthesis flow and timing closure, CDC, FEV. Knowledge of Python, Perl is a must. - Knowledge of considerations for performance, power, and cost optimization is desirable. - Knowledge of formal property verification using Jasper is preferred. - Demonstrate excellent self-motivation, communication, strong problem-solving, and teamwork skills. - Ability to set aggressive goals and meet/beat commitments. - Flexible enough to work in a dynamic environment and multitask seamlessly, with the ability to work independently and in a team. - Knowledge in IPs like I2C, I3C, SPI, UART, etc., is preferred. - Experience in the field of Dfx (ATPG coverage, SCAN insertion, VISA insertion, etc.) will be an added advantage. In this role, you will work within the Client Computing Group (CCG) at Intel, responsible for driving business strategy and product development for Intel's PC products and platforms. The CCG aims to deliver purposeful computing experiences that unlock people's potential, allowing each person to focus, create, and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. This role will be eligible for a hybrid work model, allowing employees to split their time between working on-site at their assigned Intel site and off-site. Please note that job posting details such as work model, location, or time type are subject to change. ,
