12 I3C Jobs

As an Electrical Senior Principal Engineer in our Electrical Engineering team in Bangalore, you will play a crucial role in the full hardware development lifecycle, from concept to production. Your expertise in system architecture definition, design, analysis, prototyping, sourcing, debugging, and validation of layouts will contribute to delivering state-of-the-art products that cater to the changing world's needs. Collaborating closely with designers, cross-functional teams within Dell Technologies, and suppliers, you will ensure that electronic designs meet various requirements, including schedule, feature set, functionality, quality, and industry standards. Join us in making a significant social impact and unleashing your potential to do groundbreaking work in the role of an Electrical Senior Principal Engineer. In this role, you will be part of the global Field-Programmable Gate Array (FPGA) team responsible for driving innovation in the hardware development lifecycle. Working with a team of experts, you will design, analyze, prototype, source, debug, and validate layouts to create cutting-edge products. Collaboration with designers and cross-functional teams will be key to ensuring that electronic designs meet stringent requirements and industry standards. Key Responsibilities: - Collaborate with front-end teams and industry partners to design next-generation HW features - Conduct feature and cost trade-off analysis and provide technical recommendations - Offer design guidance to support global teams effectively - Deliver system interfaces with design and process across extended teams - Prepare documentation for inspection and testing procedures To excel in this role, you should possess: Essential Requirements: - 12-18 years of experience in FPGA hardware verification using Verilog coding, System Verilog, and VHDL coding practices - Proficiency in UVM Verification framework, Assertion-based Verification, Code coverage, and Unit-level simulations - Expertise in digital design methods such as CDC, RDC, timing constraints definition, and static timing analysis - Experience in RTL Digital Design verification of x86 Core or ARM processor architecture - Knowledge of Peripheral Protocols like I2C, I3C, SMbus, IPMI, IPMB Desirable Requirements: - Familiarity with x86 (AMD & Intel) and ARM architecture - Deep understanding of hardware and software interactions to resolve issues effectively At Dell Technologies, we value the unique contributions of each team member and prioritize their growth and development. If you are seeking an opportunity to advance your career in a collaborative environment with cutting-edge technology, we invite you to be part of our team. Dell Technologies is committed to fostering an inclusive work environment that promotes equal employment opportunities and is free of discrimination and harassment. To learn more about our Equal Employment Opportunity Policy, please refer to the official policy document. Join us on our journey to build a future that benefits everyone, as progress requires the collective efforts of all individuals.,

You will be responsible for developing the logic design, register transfer level (RTL) coding, and simulation for an IP required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs. Additionally, you will participate in defining the architecture and microarchitecture features of the block being designed. You will apply various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals, as well as design integrity for physical implementation. It will be your responsibility to review the verification plan and implementation to ensure design features are verified correctly. You will also resolve and implement corrective measures for failing RTL tests to ensure the correctness of features. Providing support to SoC customers to ensure high-quality integration and verification of the IP block will also be a part of your role. Furthermore, you will drive quality assurance compliance for a smooth IP SoC handoff. Qualifications: - A Master of Science (or a Master of Technology) degree in Electrical Engineering with more than six years of relevant industry experience, or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than eight years of relevant industry experience. - Expertise in microarchitecture, design, development, and integration of design blocks (IP) for system-on-chip (SoC) components. - Knowledge of power management is preferred, and experience with formal apps would be beneficial. - Expertise in Verilog and System Verilog-based logic design. - Experience in synthesis flow and timing closure, CDC, FEV. Knowledge of Python, Perl is a must. - Knowledge of considerations for performance, power, and cost optimization is desirable. - Knowledge of formal property verification using Jasper is preferred. - Demonstrate excellent self-motivation, communication, strong problem-solving, and teamwork skills. - Ability to set aggressive goals and meet/beat commitments. - Flexible enough to work in a dynamic environment and multitask seamlessly, with the ability to work independently and in a team. - Knowledge in IPs like I2C, I3C, SPI, UART, etc., is preferred. - Experience in the field of Dfx (ATPG coverage, SCAN insertion, VISA insertion, etc.) will be an added advantage. In this role, you will work within the Client Computing Group (CCG) at Intel, responsible for driving business strategy and product development for Intel's PC products and platforms. The CCG aims to deliver purposeful computing experiences that unlock people's potential, allowing each person to focus, create, and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. This role will be eligible for a hybrid work model, allowing employees to split their time between working on-site at their assigned Intel site and off-site. Please note that job posting details such as work model, location, or time type are subject to change. ,

Qualcomm India Private Limited is looking for an Engineer Senior in Hyderabad with expertise in Embedded Systems BSP engineering. The ideal candidate should have a minimum of 3 to 5 years of experience in embedded systems design and development. Proficiency in C-programming and a solid understanding of operating system concepts, including Linux and RTOS, are essential for this role. Additionally, the candidate should possess a good understanding of the end-to-end software development cycle and at least 3 years of experience in Linux drivers programming. A strong knowledge of hardware understanding, schematics, and ARM architecture details is required, along with the ability to analyze and debug complex system-level issues. Familiarity with communication protocols such as I2C, SPI, UART, I3C, etc., is also a plus. Minimum qualifications include a Bachelor's degree in Engineering, Information Systems, Computer Science, or related field with 2+ years of Software Engineering or related work experience, or a Master's degree with 1+ year of experience, or a PhD in the relevant field. A minimum of 2 years of academic or work experience with programming languages such as C, C++, Java, Python, etc., is also required. The responsibilities of the Engineer Senior role at Qualcomm India Private Limited include designing and developing Linux device drivers and working on open-source code. Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. If you need an accommodation during the application/hiring process, you can email disability-accommodations@qualcomm.com or call Qualcomm's toll-free number. Qualcomm expects its employees to adhere to all applicable policies and procedures, including security and confidentiality requirements. Staffing and recruiting agencies are advised that Qualcomm's Careers Site is for individuals seeking jobs directly at Qualcomm. Unsolicited submissions from agencies will not be considered. For more information about this role, please contact Qualcomm Careers.,

HCL Technologies is a next-generation global technology company that helps enterprises reimagine their businesses for the digital age. With a strong foundation built on four decades of innovation, a world-renowned management philosophy, and a relentless focus on customer relationships, we pride ourselves on our culture of invention and risk-taking. HCL is committed to diversity, social responsibility, sustainability, and education initiatives, exemplified by our worldwide network of R&D facilities and co-innovation labs. With over 187,000+ Ideapreneurs across 50 countries, we deliver holistic services across industry verticals to leading enterprises, including 250 of the Fortune 500 and 650 of the Global 2000. Enterprises today are at a critical juncture where digital technologies such as analytics, cloud, IoT, and automation are key to success. To help enterprises leverage these technologies for their business objectives, HCL offers an integrated portfolio of products and services through three business units: IT and Business Services (ITBS), Engineering and R&D Services (ERS), and Products and Platforms (P&P). As a Technology Manager at HCL Technologies in Ha Noi or Ho Chi Minh (Vietnam), your responsibilities will include managing technology in projects, providing technical guidance or solutions, developing and guiding team members to enhance their technical capabilities, preparing status reports to minimize exposure and risks on projects, ensuring process compliance, and participating in technical discussions or reviews. **Responsibilities:** - Manage technology in projects and provide technical guidance or solutions - Develop and guide team members to enhance their technical capabilities - Prepare and submit status reports to minimize exposure and risks on projects - Ensure process compliance in the assigned module and participate in technical discussions or reviews **Requirements:** - 5+ years of experience - Bachelors/Masters degree in Electronics/Electrical Engineering with 5+ years of experience in verification - Good understanding of ASIC/SoC life cycle - Experience in OVM/UVM methodologies using SV - Experience with Full chip test plan development/modification - Experience with Testbench development/modification, Test case development, coding, execution, bug analysis, Regressions, coverage analysis, Verification closure - Experience in prevalent standards & Protocols viz. PCIe Gen3/4/5/USB3/DDR4/5, /Ethernet/CSI2/I3C/AMBA - Experience with Gate level simulations - Experience in scripting - Participation in multiple ASIC/SoC verifications till tape out stage - Good command of English. Opportunity to work onsite in Japan **Benefits:** - 18 paid leaves per year (including 12 annual leaves + 6 personal leaves) - Insurance plan based on full salary + 13th salary + Performance Bonus - 100% full salary in probation period - Medical Benefit for Employee and Family - Fast-paced, flexible, and multinational working environment - Opportunity to travel onsite (in 49 countries) - Internal Training (Technical & Functional). Scope of English Training - Working hours: 8:30 AM-6:00 PM, Mondays to Fridays,

Bachelors or Masters degree in Electrical, Electronics or Computer Science Engineering Expertise in C++ programming Expertise in post silicon diagnostics development Expertise in post silicon diagnostics validation Expertise in IO IPs such as I2C, I3C, UART, SATA, SPI, eSPI, ACPI Expertise in PC Hardware, SoC, Chipsets, CPU, GPU, BIOS, firmware etc. Expertise in x86 / computer architecture Expertise in OS internals Strong knowledge of software development life cycle Preferred resources with valid regional work permit

As a Senior FPGA Design Engineer at Prodigy Technovations in Bangalore/Bengaluru, you will have the opportunity to work on existing and next-generation Protocol Analyzers and similar products. Your role will involve contributing to the entire FPGA-based product development flow, from requirement analysis to final product testing in a lab environment. Your responsibilities will include architecture/micro-architecture design, Verilog logic implementation for targeted FPGA, and writing test benches to validate the design. You will collaborate closely with board design, software, testing, and lab teams to ensure the product meets customer requirements. Additionally, you will work with interfaces such as PCIe, GigE, MPHY/UFS, DPHY/CSI/DSI, USB, SD, eMMC, I3C/I2C, SPI/QSPI, among others. Qualifications: - BE/ME in Electronics from a reputed college, with a specialization in VLSI and Embedded Design being a plus. - 3 to 8 years of experience in designing and implementing FPGA-based solutions in Xilinx or Altera FPGA, preferably in FPGA-based product development. - Experience in System Design with Xilinx/Altera FPGA devices and relevant tools. - Proficiency in Verilog and/or VHDL coding. - Experience in synthesis, implementation, and using constraints to achieve timing requirements. - Knowledge of high-speed FPGA designs and Static Timing Analysis (STA) is advantageous. - Experience in building test benches for verification, board-level testing, and system debugging. - Familiarity with protocols like UFS, UniPro, USB, Ethernet, PCIe, I3C, I2C, SPI, QSPI, UART, JTAG, SPMI, RFFE, SD, eMMC. - Hands-on experience with FPGA debugging tools, oscilloscopes, and Logic Analyzers. - Strong problem-solving and debugging skills. If you are a motivated and experienced FPGA Design Engineer with a passion for product development and a strong background in FPGA technologies, we encourage you to apply for this exciting opportunity. Join our team at Prodigy Technovations and be part of creating cutting-edge solutions for top semiconductor companies.,

Role & responsibilities Preferred candidate profile BMC/OpenBMC developer Very good in programming using C/C++ Exposure to on board communications like I2C, I3C, SPI, FPGA and CPLD Able to understand the Schematics Good to have Python experience

Experience - 6- 12 Years Notice - Immediate to 15 days Requirements:- BMC/Open BMC developer. Very good in programming using C/C++. Exposure to on board communications like I2C, I3C, SPI, FPGA and CPLD. Able to understand the Schematics. Good to have Python experience.

Bachelors or Masters degree in Electrical, Electronics or Computer Science Engineering Expertise in C++ programming Expertise in post silicon diagnostics development Expertise in post silicon diagnostics validation Expertise in IO IPs such as I2C, I3C, UART, SATA, SPI, eSPI, ACPI Expertise in PC Hardware, SoC, Chipsets, CPU, GPU, BIOS, firmware etc Expertise in x86 / computer architecture Expertise in OS internals Strong knowledge of software development life cycle Preferred resources with valid regional work permit Location - Bangalore, Belgrade, Penang, New York

Bachelors or Masters degree in Electrical, Electronics or Computer Science Engineering Expertise in C++ programming Expertise in post silicon diagnostics development Expertise in post silicon diagnostics validation Expertise in IO IPs such as I2C, I3C, UART, SATA, SPI, eSPI, ACPI Expertise in PC Hardware, SoC, Chipsets, CPU, GPU, BIOS, firmware etc. Expertise in x86 / computer architecture Expertise in OS internals Strong knowledge of software development life cycle Preferred resources with valid regional work permit Location - Bangalore, Belgrade, Penang, New York

Bachelors or Masters degree in Electrical, Electronics or Computer Science Engineering Expertise in C++ programming Expertise in post silicon diagnostics development Expertise in post silicon diagnostics validation Expertise in IO IPs such as I2C, I3C, UART, SATA, SPI, eSPI, ACPI Expertise in PC Hardware, SoC, Chipsets, CPU, GPU, BIOS, firmware etc. Expertise in x86 / computer architecture Expertise in OS internals Strong knowledge of software development life cycle Preferred resources with valid regional work permit Location : - Belgrade, Penang, New York,Bengaluru

Being part of DCS group, candidate will be working on PCIe, CXL based Switches, Re-timers and flash controllers for data-centers. Responsibilites: Create Micro-Architecture Specification. Work with team members to design RTL and provide support to verification. Work on constraint development for CDC, RDC and synthesis. Review Test plans from Verification team. Support Emulation and Firmware team in bringup. Qualifications/Requirements Qualifications/Requirements Minimum B.Tech/M.Tech in Electronics or related field. 10+ years of experience in RTL Design and timing aspects of IC design, with leadership capability. Key Skills: Expertise in VLSI logic design, understanding architecture and design planning. Expertise in synthesis/debugging, and timing closure. Knowledge of protocols like PCIe, CXL, AXI, AHB, I3C etc. Proficiency in Tcl and Perl scripting. Power planning and implementation techniques. Proficiency in CDC, RDC and constraint development. Excellent debugging, analytical, and leadership skills. Strong communication skills and interpersonal abilities.