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Job Type

Full Time

Job Description

minimum Qualifications:

Floorplanning, PNR and STA

Clock Tree Synthesis

Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc

Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting

Principal Duties and responsibilities:

PNR implementatio

Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc)

Quick learner with good analytical and problem solving skills

Qualifications:

• 20+ years Hardware Engineering experience or related work experience.

• 17+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

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