ASIC Physical Design Lead

Job Description

P MTS SILICON DESIGN ENGINEER (AECG ASIC PD Architect) THE ROLE: The focus of this role in the AECG ASIC organization is to lead physical design architecture and flow development for next generation ASICs that meet Engineering, Business and Customer requirements. THE PERSON: AMD is looking for an engineering leader passionate about driving the best Power Performance Area (PPA) of ASIC solutions for AECG customers. The ideal candidate will have proven experience in driving physical design optimization to deliver industry leading performance/area and performance/power. In this role the candidate will work with the customer, SOC architects, the CAD team and the design team and drive floorplanning and physical design flows for best in class ASIC solutions. KEY RESPONSIBILITIES: Technical Physical Design lead on AECG ASIC solutions, focused on driving the best Power, Performance, Area for customers. Work with customers and internal teams to evaluate IP choices, analyze die size and provide floorplan tradeoffs during customer acquisition phase. Provide expert guidance to physical design execution teams within AMD and with external partners to drive delivery to customer commitments. Develop technical relationships with broader AMD Design/CAD community and peers. PREFERRED EXPERIENCE: Strong understanding of development of custom ASICs for external customers. Strong background in physical design with exposure to circuit and logic design. Proven track record of delivering SOCs in process technologies 7nm and below. Expert user of P&R, Timing and Physical verification tools from top EDA vendors. Proven expertise in developing physical implementation flows as required. Ability to co-optimize and make appropriate tradeoff across architecture, front-end design, and back-end design. Experience in leading a small team of high performing individuals. EDUCATION & EXPERIENCE: BS or MS degree in in Electrical Engineering or Computer Science. 16+years of experience in physical design role leading to an understanding of RTL to GDS development. #LI-SR4 Benefits offered are described: AMD benefits at a glance .