Application Specific Integrated Circuit Verification Engineer

As an ASIC/SoC Verification Engineer at our company, you will be responsible for overseeing a team of 23 engineers and utilizing your expertise in GLS (Gate-Level Simulation) to construct test-benches from scratch in System Verilog (SV) and UVM. **Key Responsibilities:** - Craft verification plans and environments effectively - Lead debugging processes - Provide mentorship to junior engineers - Demonstrate top-notch communication skills - Collaborate cross-functionally with efficiency - Develop test benches for high-speed protocols **Qualifications:** - Minimum 3 years of experience in ASIC/SoC Verification **Preferred Skills:** - Experience in high-speed protocols If you are a skilled ASIC/SoC Verification Engineer with a strong background in GLS, System Verilog, and UVM, we encourage you to apply for this challenging position.,