639 Vhdl Jobs - Page 13

As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Understand the design specification , Memory and Memory BIST engine connections Develop the verification environment and test bench and creating testcases. Debug fails using waveform, trace tools and debug RTL code Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 5 + years of experience in Design Verification - demonstrated execution experience of verification of logic blocks Strong in DFT Verification - Demonstrated execution experience of verification of Memory BIST Knowledge of verification (any) methodology, Knowledge of HDLs (Verilog, VHDL) Good object-oriented programming skills in C/C++, and any of scripting languages like Python/Perl Development experience on Linux/Unix environments and in GIT repositories and basic understanding of Continues Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in verification coverage closure Hardware debug skills backed by relevant experience on projects Preferred technical and professional experience Knowledge of Chip-Initialisation , SCAN , etc Scripting Expertise backed up relevant experience in the same Writing Verification test plans Functional and code coverage analysis and debug

Lead the unit level pre-silicon functional & performance verification the Load Store Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for LSU, including the Load and Store pipelines, D-Cache, Address translation, out of order execution of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

- Lead the architecture, design and development of an Interrupt Controller for a highly virtualized, multi-threaded, many-core and multi-socket SMP (symmetric multi-processor) . - Develop the features, present the proposed architecture in the High level design discussions to hardware and software teams - Develop micro-architecture, Design RTL, Collaborate with the Verification, DFT, Physical design, firmware, software teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in silicon bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. - Estimate the overall effort to develop the feature - Estimate the silicon area required for the feature Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise - 10 to 15 years of relevant experience - At least 1 generation of processor interconnect design delivery leadership (eg UPI, axi, amba, NoC). - Expertise of SMP coherency - Experience in different on-chip interconnect topologies (e.g., mesh, crossbar) - Understanding of various snoop and data network protocols - Understanding of latency & bandwidth requirements and effective means of implementation - Working knowledge of queuing theory - numa/nuca architecture - Proficient in HDLs- VHDL / Verilog - Experience in High speed and Power efficient logic design - Experience in working with verification, validation, physical design teams for design closure including test plan reviews and verification coverage - Good understanding of Physical Design and able to collaborate with physical design team for floor planning, wire layer usage and budgets, placement of blocks for achieving high-performance design - Experience in leading uarch, RTL design teams for feature enhancements. - Follow agile project leadership principles. Work with the team on estimation and execution plan. - Ability to quickly understand issues spanning multiple functional domains, switch context frequently and provide solutions to problems, is necessary. Preferred technical and professional experience Bachelors / Masters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance.

1. Hands on work on custom layout for analog blocks like High Speed SerDes and General purpose IO designs with Cadence Virtuoso on latest technologies like 5nm and below and also take leadership roles in delivery of IPs 2. Work on Floor planning, power design, signal routing strategy, EMIR awareness andparasitic optimisations 3. Understand and apply analog Layout techniques to ensure the design meets performance with minimum possible area and good yield. 4. Participate in building and enhancing layout flow for faster, higher quality design process. 5. Checking physical verifications like DRC/LVS/ERC/ANT/DFM and other IBM internal checks 6. Collaborate with Circuit Designers to solve challenging problems 7. Writing /PYTHON scripts to automate repetitive tasks 8. Work with Place and Route engineer to integrate custom macros into top level. 9. Able to perform design reviews across global team 10. Work closely with required global teams to ensure the success of the whole product. 11. Leadership in delivery of macros we plan to own from India Job requirements: 1. Experience in doing layouts for analog blocks like SerDes, ADCs, DACs, LDOs, PLLs, BGAP & amplifiers etc. 2. Experience in designing layouts for high-speed circuits is a plus. 3. Layout experience in the following technology nodes3nm, 5nm and 7nm FinFET. 4. Good team worker with multi-discipline, multi-cultural and multi-site environments 5. Strong fundamental knowledge in semiconductor device physics, layout principles, IC reliability and failure mechanisms6. Good problem-solving skills are essential where problems are analysed upfront, identifying gaps, and providing optimum solutions7. Knowledge in Skill/perl/tcl/Python scripting is a plus. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise The Analog layout design engineer with experience in next generation Ultra high speed serial IO link (HSS) interface for Cognitive, ML,DL, and data center applications. The engineer needs to have knowledge in the design and development full custom analog layouts for ultra high speed 32G/50G/112G IO link interfaces. Preferred technical and professional experience Experience in 3,5,7,14 nm analog layout design. Working on Cutting edge technology and HSS domain . Quick learner, deep layout design knowledge, problem solving skills and good communication skills with cross teams across the Geos.

-Lead the Architecture, Design and development of processor L2 and LLC (Last Level Cache) for high-performance IBM Systems. - Design and architect L2 cache and LLC as driven by capacity, latency, bandwidth, and RAS requirements. - Develop the features, present the proposed architecture in the High level design discussions - Develop micro-architecture, Design RTL, Collaborate with Verification, DFT, Physical design, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in silicon bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise -8+ years of relevant experience - At least 1 generation of processor L2 cache or LLC design delivery leadership. - Expertise in cache coherence protocols for symmetric multiprocessors (SMP), covering both chip SMP and multi-socket SMP. - Experience with NuCA / NuMA (Non-uniform Cache / Memory architecture) architectures and implementations. - Working knowledge of memory consistency, store ordering, weakly and strongly ordered memory. - Experience in logical and physical design of caches including directories (tags, set associative memories), data SRAM, design for low latency, multiple parallel finite state machine design, deadlock-free designs.

Job Description As an FPGA Engineer specialised in RTL (Register Transfer Level) coding, you will be responsible for designing, optimising, and implementing hardware solutions on Field-Programmable Gate Arrays (FPGAs) to support high-frequency trading strategies. You will work closely with the trading systems team to develop and deploy ultra-low latency trading infrastructure, ensuring the highest levels of performance, reliability, and efficiency. Key Responsibilities RTL Design and Optimisation: Design and optimise FPGA-based solutions using RTL coding techniques to achieve ultra-low latency and high throughput for trading algorithms and strategies. Algorithm Implementation: Implement trading algorithms and strategies in hardware, leveraging FPGA capabilities to minimise latency and maximise performance. Hardware Acceleration: Identify opportunities for hardware acceleration of critical trading functions and develop FPGA-based solutions to achieve significant speedups. Performance Analysis and Tuning: Conduct performance analysis of FPGA designs, identify bottlenecks, and fine-tune the implementations to achieve optimal performance. Hardware Integration: Collaborate with software engineers and system architects to integrate FPGA-based solutions into the overall trading infrastructure, ensuring seamless operation and compatibility. Testing and Validation: Develop test benches and perform thorough testing and validation of FPGA designs to ensure correctness, reliability, and robustness under real-world trading conditions. Documentation and Reporting: Document FPGA designs, methodologies, and implementation details, and provide regular reports and updates to stakeholders on project progress and performance metrics. Requirements Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Proven experience in FPGA design and development, with a focus on RTL coding using Verilog or VHDL. Deep understanding of computer architecture, digital design principles, and hardware/software co-design concepts Experience with high-frequency trading systems and ultra-low latency design techniques is highly desirable. Proficiency in FPGA development tools and workflows, such as Xilinx Vivado or Intel Quartus. Strong analytical and problem-solving skills, with the ability to optimise designs for performance, power, and resource utilisation. Excellent communication and collaboration skills, with the ability to work effectively in a fast-paced, team-oriented environment. Show more Show less

LTTS India Bangalore Job Description An RTL (Register Transfer Level) engineer specializes in designing and verifying digital circuits at a level of abstraction that focuses on the flow of data between registers. They use Hardware Description Languages (HDLs) like Verilog or VHDL to model the behavior of digital circuits before they are physically implemented. Job Requirement RTL Engineer

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary QCT's Bangalore Wireless R&D HW team is looking out for experienced HW design engineer to work on WRD IPs for Qualcomm’s best in class Mobile chipsets. Location : Bangalore Roles And Responsibilities You will be contributing to flagship Wireless IP development covering WAN, WLAN, GNSS and Bluetooth technologies. You will be part of team defining and developing next generation Wireless R&D products. Requirements The candidate must have IP design experience preferably in wireless/DSP domain. The candidate must be strong in design micro-architecture & RTL coding (System Verilog or Verilog or VHDL). Other requirements are : Exposure to synthesis & STA Low power and high speed design awareness Knowledge on design flow, industry standard frond end tools flows ( lint, cdc, etc.) Knowledge of scripting and automation: Unix/Linux shell programming, Perl, Python, Makefile etc. Strong critical thinking, problem solving and debug skills Good communication and interpersonal skills. Flexible to work with multi-geo team Minimum qualification : Bachelors or Master’s in Electrical/Electronics/Computers Science from reputed college/university. Years of experience : 2 – 4years Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3071058 Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices. In this role, you will work with chip architects to conceive of the micro-architecture, and also help with architecture/product definition through early involvement in the product life-cycle. As an RTL engineer you will own or participate in the following: Performance exploration. Explore high performance strategies working with the CPU modeling team. Microarchitecture development and specification. From early high-level architectural exploration, through micro architectural research and arriving at a detailed specification. RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing goals. Functional verification support. Help the design verification team execute on the functional verification strategy. Performance verification support. Help verify that the RTL design meets the performance goals. Design delivery. Work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and power. Skillset Looking For Thorough knowledge of microprocessor architecture including expertise in one or more of the following areas: Active power management (DVFS) , Idle power management , Limit management (TDP, Thermal and Over-current protection), Clock management, Debug and Trace architecture. Knowledge of Verilog and/or VHDL. Experience with simulators and waveform debugging tools. Knowledge of logic design principles along with timing and power implications. Additional Job Description Additional Job Description MS degree in Computer or Electrical Engineering. Understanding of low power microarchitecture techniques. Understanding of high performance techniques and trade-offs in a CPU microarchitecture. Experience using a scripting language such as Perl or Python. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3071113 Show more Show less

The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique One Cadence - One Team culture promotes collaboration within and across teams to ensure customer success Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other every day. Job Summary: We are looking for 14+ years of experience having the following skillset: Strong RTL design fundamentals using HDLs like VHDL/Verilog/System verilog Strong understanding of AMD (Xilinx) ultrascale, versal FPGAs architecture and use of vivado for FPGA place and route. Constraints definitions for FPGAs. Doing Static Timing Analysis. Familiarity with FPGA prototyping or emulation is a plus. Passionate to learn and explore new technologies and demonstrates good analysis and problem-solving skills. Good written and verbal communication skills, should be a quick learner and a team player.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Position: Principal Software Engineer Location: Noida Job Responsibilities The role’s day to day responsibilities cover: R&D support of application and product engineers for customer problems and requests. This consists of problem analysis, debugging and fixing, or the development of new features and enhancements to improve synthesis results with respect to timing, area and power. This job will suit applicants looking to continue their software engineering career in an intellectually stimulating and challenging problem domain. There is a significant research element to the work that Cadence does that is truly innovative; we don’t know what the answers are when we start out! Mentoring and support will be provided to the successful candidate to both enable contribution to the large EDA problem domain and to develop their programming skills into professional software engineering skills. Job Qualifications BE/BTech/ME/MTech- Computer Science or others Experience: 10-15 Years Required Skills The successful candidate will possess the following combination of education and experience: Proficient in C/C++ Excellent programming and software engineering skills Experience With UNIX And/or LINUX Platforms Is Preferred RTL knowledge – System Verilog, VHDL is preferred Strong knowledge of Tcl is preferred Experience in language compiler Prior experience with large software development projects is highly recommended Prior experience with timing analysis software development projects is highly recommended Data structure and algorithmic skills We’re doing work that matters. Help us solve what others can’t. Show more Show less

Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for. Responsibilities & Skills What Will You Get to Do? Do you have a passion for invention and self-challenge? This position gives you an opportunity to learn and participate in one of the most cutting-edge projects that Lattice’s Silicon Engineering team has embarked upon to date. We are validating building blocks in FPGA on board level to ensure functionality and performance aspect of Design intent. FPGA consists of various IPs as a building block such as SERDES(PMA/PCS), Memory DDR(DDR4, LPDDR4, DDR5 etc), DPHY, PLL, DSP, Fabric, I/O etc. As a Silicon Design Validation engineer, you will have an opportunity to learn and train yourself on how to validate one/or many of the building blocks within the FPGA. And also, you will be able to acquire knowledge on process/methodology required for validating certain IPs from planning to completion. While you are working on those, you will be exposed to cutting edge equipment and advanced boards as well as Various SW/tools/scripts. What you’re going to be exposed to and learn: The Ideal Candidate Is Highly Motivated In Developing a Career In Silicon Design Validation Engineering. You Will Get Significant Exposure And Training In The Following Areas Chance to learn FPGA and it’s build block such as SERDES(PMA/PCS), Memory DDR(DDR4, LPDDR4, DDR5 etc), DPHY, PLL, DSP, MIPI, Fabric, I/O etc but not limited. Validate and characterize various IPs from silicon arrival to release to production. Develop validation and characterization plans for certain IP, bench hardware and software. Develop test logic RTL to achieve intended validation/characterization test. Drive new silicon product bring-up, validation, debug to asses IP functionality/performance. Characterizing data sheet parameters. Analyzing the measured data with statistical view. Data sheet preparation etc. Serve as the central resource with design, verification, manufacturing, test, quality and marketing/apps as the product(s) move Silicon arrival to product release. Supporting customer issues as required to resolve issues found after product release You Have… 8+ years of experience Electrical Engineering degree with a strong desire to pursue an engineering career in Silicon Design Validation Capability to lead small group of teams as tech lead. Expertise in High Speed Serdes Interface characterization and protocol compliance testing such as PCIe/Ethernet/SDI/CoaXpress/JESD204, MIPI D-PHY, MIPI CSI/DSI-2, USB and DisplayPort/HDMI etc. Expertise in high speed board design and signal integrity evaluation/debug. Expertise in Verilog/VHDL and design implementation using FPGA development tools. Expertise in test automation development using programming languages such as Python, Perl. Knowledge of statistical analysis concepts and use of analysis tools such as JMP, R. Proficiency with bench equipment for device characterization such as BERT, VNA, Oscilloscopes, Protocol Exerciser/Analyzers. Exposure on FPGA(emulation/prototyping etc) Strong written and verbal communication skills to work with cross-functional team Self-motivated and proactive with critical thinking. Good problem solving and debugging skills. Who Are We? At Lattice, we are good at collaboration and problem solving. We’re also good at having a bit of fun. We develop technologies that we monetize through differentiated programmable logic semiconductor products, system solutions, design services and licenses. We are the low power programmable leader. We solve customer problems across the network, from the Edge to the Cloud, in growing communications, computing, industrial, automotive and consumer markets. Our technology, long-standing relationships and commitment to world-class support enable our customers to create a smart, secure, and connected world. Join Team Lattice…and help us continue to drive innovation that creates a smarter, better-connected world. Together, we enable what’s next. Show more Show less

Job Summary: We are seeking a highly skilled Electronics Engineer to join our team for the design and development of Time-of-Flight (ToF) camera systems . The ideal candidate will have experience in high-speed analog and digital circuit design, sensor integration, power management, and embedded systems, with a strong understanding of optoelectronics and signal integrity. Key Responsibilities: Design and develop electronic hardware for ToF camera systems, including: High-speed signal acquisition Analog front-end (AFE) and timing circuits Power supply design and distribution FPGA/MCU integration and interface circuitry Select and integrate ToF sensors, VCSEL/LED light sources, and optical drivers Work closely with firmware, software, and optics teams to ensure system-level performance Conduct signal integrity and EMI/EMC analysis to optimize performance Create detailed schematics, PCB layouts, and bills of materials (BOM) Prototype and validate designs through simulation and bench testing Support camera calibration , debugging, and bring-up processes Document design processes, validation results, and compliance standards Interface with suppliers and contract manufacturers during prototype and production stages Required Qualifications: Bachelor’s or Master’s degree in Electronics Engineering, Electrical Engineering , or a related field 3+ years of experience in electronics hardware design , preferably in imaging or optoelectronic systems Proficiency in schematic capture and PCB layout using tools like Altium Designer, Cadence, or KiCAD Strong knowledge of analog and digital circuit design , including ADCs, DACs, timing circuits, and clock distribution Experience with ToF, LiDAR, CMOS image sensors , or similar technologies Familiarity with power supply design (DC-DC converters, LDOs) and thermal considerations Understanding of signal processing, noise reduction , and timing synchronization Experience with lab equipment: oscilloscopes, logic analyzers, signal generators, etc. Preferred Qualifications: Experience with FPGA programming (e.g., VHDL or Verilog) or MCU-based embedded systems Knowledge of optics and IR light propagation in imaging systems Experience in camera module testing , image quality evaluation, and calibration Familiarity with 3D sensing applications , such as gesture recognition, depth mapping, or AR/VR Understanding of reliability testing , certification (e.g., CE, FCC), and safety standards (IEC/UL) Soft Skills: Strong problem-solving and analytical skills Excellent verbal and written communication Team-oriented, proactive, and detail-driven Ability to manage multiple priorities in a fast-paced environment What We Offer: Opportunity to work on cutting-edge 3D sensing technology Dynamic and collaborative work environment Competitive compensation and benefits package Professional development and career growth Job Type: Full-time Pay: ₹1,000,000.00 - ₹2,500,000.00 per year Education: Bachelor's (Preferred) Experience: total work: 1 year (Preferred)

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, we enable our customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, we’ve got quite a lot to offer. How about you? We blur the boundaries between industry domains by integrating the virtual and physical, hardware and software, design and manufacturing worlds. With the rapid pace of innovation, digitalization is no longer tomorrow’s idea. We take what the future promises tomorrow and make it real for our customers today. Join us - where your career meets tomorrow. Looking for Siemens EDA Ambassadors- QuestaSim (Simulation) R&D team (strong AI/ML background) This is your role In this role, you will, craft and develop AI/ML-driven algorithms and solutions to improve simulation tools' performance and capabilities. Contribute to building state-of-the-art engines and components, integrating machine learning techniques into simulation and verification workflows. Contribute to the development and improvement of production-quality components, algorithms, and engines while supporting and improving existing codebases. Solve complex, open-ended problems in collaboration with a senior group of engineers in a fast-paced and multifaceted environment. Apply technical expertise in AI/ML frameworks, data-driven problem solving, and traditional simulation technologies to achieve project milestones. Stay self-motivated, disciplined, and focused while driving innovation within the team. Required Qualifications We are seeking a graduate with Bachelor’s or Master’s degree in Computer Science, Artificial Intelligence, Electrical Engineering, or a related technical field from an accredited institution. We value your experience with conceptualizing, defining, architecting, and implementation of an open-ended problem scope or new insights. Hands-on experience with AI/ML techniques, including supervised and unsupervised learning, neural networks, and reinforcement learning. Strong proficiency in programming languages like C/C++ and Python, along with strong foundations in algorithms and data structures. Knowledge of machine learning and deep learning frameworks. Strong understanding of Compiler Concepts, Optimizations, and parallel computing. Experience working on UNIX and/or LINUX platforms. Excellent problem-solving and analytical skills. Proven track record to work independently, take ownership of tasks, and deliver results A plus! Basic knowledge of Digital Electronics and concepts related to SystemVerilog, Verilog, and VHDL. Exposure to Simulation technologies or Formal-based Verification methodologies is a plus! We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. #LI-EDA #LI-HYBRID

JOB DESCRIPTION Key Responsibilities:  Develop RTL code using Verilog/VHDL for FPGA implementations.  Optimize hardware designs for performance, area, and power.  Work on Xilinx Vivado IPs and other FPGA toolchains.  Implement and optimize DSP algorithms for image and signal processing.  Work with MATLAB/Simulink for algorithm modeling and hardware mapping.  Perform functional and timing verification using UVM, SystemVerilog.  Develop testbenches, run simulations, and analyze waveforms.  Conduct post-synthesis and post-layout verification.  Implement and verify standard communication protocols (I2C, SPI, UART, PCIe, AXI, etc.).  Integrate and validate external peripherals in FPGA-based designs.  Guide students and Ph.D. scholars in developing VLSI-based academic projects.  Provide documentation, reports, and technical support for research work.  Deliver workshops and training sessions on VLSI, FPGA, and Signal Processing. Required Skills & Qualifications :  B.Tech/M.Tech/Ph.D. in VLSI, Electronics, Electrical, or a related field.  Strong experience in RTL design (Verilog/VHDL).  Hands-on experience with FPGA toolchains (Xilinx Vivado, Quartus, etc.).  Knowledge of MATLAB/Simulink for DSP applications.  Expertise in verification methodologies (UVM, SystemVerilog, ModelSim, QuestaSim).  Familiarity with communication protocols (AXI, PCIe, Ethernet, etc.).  Experience in hardware debugging and timing analysis.  Experience in HLS (High-Level Synthesis).  Knowledge of ASIC design flow and RTL-to-GDSII concepts.  Exposure to AI/ML accelerators on FPGA (optional but a plus).  Passion for mentoring students and guiding research projects. Job Type: Full-time Pay: ₹20,000.00 - ₹30,000.00 per month Schedule: Fixed shift Experience: VLSI: 1 year (Required) Work Location: In person

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, we enable our customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, we’ve got quite a lot to offer. How about you? We blur the boundaries between industry domains by integrating the virtual and physical, hardware and software, design and manufacturing worlds. With the rapid pace of innovation, digitalization is no longer tomorrow’s idea. We take what the future promises tomorrow and make it real for our customers today. Join us - where your career meets tomorrow. We are seeking a highly motivated and experienced software engineer with a strong background in AI/ML to join the QuestaSim (Simulation) R&D team at Siemens EDA. This is your role Design and develop AI/ML-driven algorithms and solutions to improve simulation tools' performance and capabilities. Contribute to building state-of-the-art engines and components, integrating machine learning techniques into simulation and verification workflows. Contribute to the development and improvement of production-quality components, algorithms, and engines while supporting and improving existing codebases. Solve complex, open-ended problems in collaboration with a senior group of engineers in a fast-paced and multifaceted environment. Apply technical expertise in AI/ML frameworks, data-driven problem solving, and traditional simulation technologies to achieve project milestones. Stay self-motivated, disciplined, and focused while driving innovation within the team. Required Experience A Bachelor’s or Master’s degree in Computer Science, Artificial Intelligence, Electrical Engineering, or a related technical field from an accredited institution. Experience with conceptualizing, defining, architecting, and implementation of an open-ended problem scope or new insights. Hands-on experience with AI/ML techniques, including supervised and unsupervised learning, neural networks, and reinforcement learning. Strong proficiency in programming languages like C/C++ and Python, along with strong foundations in algorithms and data structures. Knowledge of machine learning and deep learning frameworks. Strong understanding of Compiler Concepts, Optimizations, and parallel computing. Experience working on UNIX and/or LINUX platforms. Excellent problem-solving and analytical skills. Proven ability to work independently, take ownership of tasks, and deliver results A plus! Basic knowledge of Digital Electronics and concepts related to SystemVerilog, Verilog, and VHDL. Exposure to Simulation technologies or Formal-based Verification methodologies is a plus! We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. #DVT Show more Show less

Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for. Responsibilities & Skills Job Summary: As a Modeling Design Engineer, you will be responsible for creating and validating of models used for Lattice FPGAs, ensuring their accuracy and performance. You will work closely with design and development teams to ensure the accuracy and reliability of our models. Key Responsibilities Develop and validate models for analog, digital, and mixed-signal circuits. Utilize simulation tools such as Verilog, VHDL, SystemVerilog, or similar, to perform digital circuit analysis. Provide technical leadership and mentorship to a team of circuit modeling engineers. Collaborate with design engineers to understand circuit requirements and specifications. Collaborate with internal customers/consumers of the models to assure their needs are comprehended and objectives are met. Analyze simulation results and provide feedback to improve models and model performance. Optimize circuit models for performance, accuracy, and efficiency. Document modeling processes, assumptions, and results for internal and external stakeholders. Stay updated with the latest advancements in circuit modeling techniques and tools. Qualifications Bachelor’s or Master’s degree in Electrical Engineering with 6+ years of experience. Proven experience in circuit modeling and simulation. Proficiency in using circuit simulation tools such as SPICE, Verilog, VHDL, System Verilog, or similar. Understanding of analog, digital, and mixed-signal circuit design principles. Skill in modeling with SystemVerilog and higher-level modeling with SystemC Excellent analytical and problem-solving abilities. Excellent communication and collaboration skills. Experience with data analysis and visualization tools is a plus. Show more Show less

Digantara is a leading Space Surveillance and Intelligence company focused on ensuring orbital safety and sustainability. With expertise in space-based detection, tracking, identification, and monitoring, Digantara provides comprehensive domain awareness across regimes, allowing end users to have actionable intelligence on a single platform. At the core of its infrastructure lies a sophisticated integration of hardware and software capabilities aligned with the key principles of situational awareness: perception (data collection) , comprehension (data processing) , and prediction (analytics) . This holistic approach empowers Digantara to monitor all Resident Space Objects (RSOs) in orbit, fostering comprehensive domain awareness. Digantara seeks a highly skilled Senior Embedded Software Engineer to design and develop embedded software solutions tailored specifically for real-time image processing. You will leverage your expertise to enable the development of state-of-the-art embedded software with applications such as tracking objects from both space and the ground.\ Why Us? Be part of a collaborative and innovative environment where your ideas and skills make a real difference to the entire space realm Push the boundaries with hands-on experience, greater responsibilities, and rapid career advancement Competitive incentives, galvanizing workspace, blazing team—pretty much everything you have heard about a startup Responsibilities Design, develop, and implement embedded software for real-time image processing for satellite payload applications. Translate and optimize image processing algorithms to FPGA/SoC platforms to achieve low latency and high throughput. Collaborate with system-level designers and hardware designers, generate software functional requirements and architecture, and ensure seamless integration of software and hardware. Collaborate effectively with cross-functional teams to conceptualize, design, and implement optimal embedded software solutions for image processing. Define and implement interface and communication protocols for data handling between the satellite payload and bus systems. Develop clean, well-structured, maintainable code and execute comprehensive testing according to space industry standards (e.g., the ECSS software engineering standard). Implement rigorous software quality assurance practices, including static analysis, code coverage analysis, and other verification techniques. Develop efficient embedded software for high-performance embedded systems with the ARM Cortex processor architecture. Leverage AMD-Xilinx/Microchip EDA tools (e.g., Vivado/Vitis IDE, Libero SoC design suite) to develop efficient embedded software solutions. Troubleshoot and resolve embedded software defects and hardware interface issues. Required Qualifications B.Tech/B.E in Electronics Engineering or M.Tech/M.E or PhD degree in Embedded Systems/VLSI. 5+ years of experience in Embedded software design and development, with a strong focus on image processing and experience in handling communication protocols. Strong proficiency in bare-metal and RTOS programming for embedded systems, with expertise in real-time scheduling, interrupt handling, and device drivers. Proven ability to optimize embedded software implementation, including code optimization, memory management, and power efficiency techniques. Proficiency in Embedded C and C/C++ programming languages. Strong understanding of data communication protocols such as I2C, UART, SPI, CAN, Gigabit Ethernet, LVDS, RS422, etc. Working knowledge of software configuration management tools and defect tracking tools. Preferred Skills Prior experience in embedded software implementation in the areas of satellite imaging payload or ground-based imaging systems is highly preferred. Working knowledge of FPGA/SoC-based embedded systems designed for image processing applications is highly valued. Experience in hardware-related programming of FPGA interfaces and high-level synthesis. Knowledge of implementing fault-tolerant embedded systems for satellite applications. Familiarity with digital image processing and implementation. Experience in Python programming language and knowledge of Verilog/VHDL. Experience with camera interfaces such as USB3, CoaXPress, CameraLink, PCIe, Gigabit ethernet, etc. General Requirements Ability to work in a mission-focused, operational environment. Ability to think critically and make independent decisions. Interpersonal skills to enable working in a diverse and dynamic team. Maintain a regular and predictable work schedule. Writing and delivering technical documents and briefings. Verbal and written communication skills as well as organizational skills. Travel occasionally as necessary. PI267575298 Show more Show less

Company Qualcomm India Private Limited Job Area Interns Group, Interns Group > Interim Engineering Intern - HW Qualcomm Overview Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. General Summary We know our employees’ ideas change the world. For more than three decades, we’ve been a global leader in mobile technology, continually pushing the boundaries of what’s possible. Working with customers across industries — from automotive to health care, from smart cities to robotics— we continue to accelerate innovation and unlock new possibilities in a time where everything is connected. By joining the Qualcomm family, you too can bring the future forward faster. SOC & Hard Macro Physical Design SOC Validation & Debug RF & Analog Layout RF/Analog/Mixed Signal/Power IC Design Low Power Design Board and FPGA Design Digital ASIC Design Design/SOC Verification CAD Solution Engineer Design for Test (DFT) CPU Design Must have educational background in one or more of the following areas: Verifying SoC with embedded RISC/DSP processors, communications/ networking ASICs. Verilog or VHDL, C/C++, Tcl/Perl/shell-scripting. RTL design experience and/or strong OO programming knowledge Knowledge of wireless/wired communications and protocols or graphics/video multi-media is a plus. Knowledge in PLL, LNA, OpAmp, CMOS, ADC/DAC, Cadence, SpectreRF, or Layout is required in RF/Analog/Mixed Signal IC Design. Excellent analytical and problem solving skills. Ability to collaborate and work in teams. Good verbal and written communication skill Educational Background Masters, Bachelors: Electrical Engineering , VLSI , Embedded and VLSI , ECE Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail myhr.support@qualcomm.com or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3063801 Show more Show less

Company Qualcomm India Private Limited Job Area Interns Group, Interns Group > Interim Engineering Intern - HW Qualcomm Overview Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. General Summary We know our employees’ ideas change the world. For more than three decades, we’ve been a global leader in mobile technology, continually pushing the boundaries of what’s possible. Working with customers across industries — from automotive to health care, from smart cities to robotics— we continue to accelerate innovation and unlock new possibilities in a time where everything is connected. By joining the Qualcomm family, you too can bring the future forward faster. SOC & Hard Macro Physical Design SOC Validation & Debug RF & Analog Layout RF/Analog/Mixed Signal/Power IC Design Low Power Design Board and FPGA Design Digital ASIC Design Design/SOC Verification CAD Solution Engineer Design for Test (DFT) CPU Design Must have educational background in one or more of the following areas: Verifying SoC with embedded RISC/DSP processors, communications/ networking ASICs. Verilog or VHDL, C/C++, Tcl/Perl/shell-scripting. RTL design experience and/or strong OO programming knowledge Knowledge of wireless/wired communications and protocols or graphics/video multi-media is a plus. Knowledge in PLL, LNA, OpAmp, CMOS, ADC/DAC, Cadence, SpectreRF, or Layout is required in RF/Analog/Mixed Signal IC Design. Excellent analytical and problem solving skills. Ability to collaborate and work in teams. Good verbal and written communication skill Educational Background Masters, Bachelors: Electrical Engineering , VLSI , Embedded and VLSI , ECE Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail myhr.support@qualcomm.com or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3063801 Show more Show less

As a SerDes Verification Architect , you will be responsible for the verification and validation of high-speed SerDes interfaces, including testing data integrity, performance, and protocol compliance. You will work closely with hardware and design teams to ensure that SerDes designs meet the required specifications, operating parameters, and quality standards. Key Responsibilities: Verification of SerDes Designs: Develop and execute verification plans and testbenches for SerDes IPs (Intellectual Property) and subsystems to ensure they meet functional and performance requirements. Testbench Development: Design and implement verification testbenches using industry-standard verification methodologies (eg, UVM, SystemVerilog, VHDL). Simulation and Debugging: Perform simulations, analyze results, and debug issues related to timing, protocol errors, and other design anomalies in SerDes blocks. Performance Evaluation: Evaluate and validate performance characteristics of SerDes systems including jitter, bit error rates (BER), signal integrity, eye diagrams, and other key metrics. Protocol Compliance Testing: Verify adherence to relevant SerDes protocols such as UCIe , PCIe, Ethernet, USB, DDR, DisplayPort, or custom protocols. Automated Testing: Develop automated regression tests to ensure the robustness and stability of the SerDes design over multiple versions and iterations. Collaboration: Work closely with the design, hardware, and software teams to troubleshoot issues, implement fixes, and verify design changes. Documentation: Create detailed reports and documentation on verification results, test scenarios, and issues found during testing. Verification methodology: Provide feedback for design and verification process improvements and contribute to innovation in verification strategies and methodologies. Experience: 16+ years of experience in SerDes verification or high-speed communication verification. Strong hands-on experience with verification methodologies such as UVM, SystemVerilog, or other simulation-based verification tools. Knowledge of high-speed serial protocols such as UCIe , PCIe, Ethernet, USB, DDR, or custom protocols. Experience in analyzing and interpreting signal integrity issues, jitter, BER, and eye diagrams. Skills: Solid understanding of SerDes architectures, link training, and equalization. Strong debugging skills, with the ability to work across multiple domains (timing, protocol, performance). Familiarity with hardware description languages (HDL) like VHDL or Verilog. Strong analytical, problem-solving, and communication skills. Experience with DDR protocol (eg, DDR3, DDR4, DDR5) for memory interface verification. Understanding of UCIe protocol and its role in chiplet-to-chiplet communication. Preferred Skills: Experience with Python, Perl, or similar scripting languages for automation. Exposure to high-speed memory interface design and verification, including DDR controller IP verification. Functional coverage, assertions knowledge in SV/UVM. Ability to work in a fast-paced environment and manage multiple verification tasks. Strong team player with good interpersonal and communication skills

Emulation Engineer [Location: Noida] Experince: 10-20 Years [ Location: NOIDA] We are seeking a diligent Emulation leader to join our team at Renesas. Responsibilities include enhancing build/debug emulation methodology and flows, develop capabilities to run simulation testbench with emulation build, working with design/verification teams for XTOR building, selecting hardware, interfacing with software/platform teams, and setting high-level technical vision, along with executing the system-level-scenarios to ensure the quality (zero-bug) silicon tape-out. Responsibilities: Create full chip emulation and FPGA prototype models for the complex automotive SoC designs Create the test sanity suite to validate the models, having various integrated transactors and memory models Develop and apply automation aids, flows and scripts to improve emulation ease of use for the users Innovate improvements to emulation methodology, working with partners across other geographies Train and mentor engineers to deliver high quality and increase productivity Build strong collaboration with other R&D teams such as Design, Verification, digital IP, Design Enablement, and Validation to achieve project milestones Drive SoC verification using emulation (Hardware Assisted Verification), includes working with design, system-architect, verification teams to develop and execute the test plans for system-level-scenarios on emulation/prototype platform Work with the EDA vendors to deploy next generation emulation technologies Qualifications Qualifications: M.Tech/B.Tech Degree in Electrical/Electronic Engineering and a minimum of 4+ years relevant industry experience Emulation experience on any/all available platforms (Palladium, Protium, Veloce or Zebu, EP) including design bring-up, build flow, debug, performance and throughput tuning Experience with Verilog, VHDL complex SoC design Experience with System Verilog, UVM, C/C++ verification environment Knowledge of communication/interface protocols would be a plus: MIPI (CSI/DSI), PCIe, UCIe, ENET, LPDDR5/4, Hyper/Octal Flashes, eMMC, SD, UFS Knowledge of DFT and GLE flows would be a plus Know-How of the AI workload and its performance aspects would be a big plus Proficient in writing scripts using any languages (Perl, TCL, bash, Python) Experience with waveform debug tools, simvision/Verdi Strong communication skills and ability to work as a team Company Description Renesas is an embedded semiconductor solution provider driven by its Purpose To Make Our Lives Easier . As the industry s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, To Make Our Lives Easier .

About the Opportunity Job TypeApplication 23 June 2025 Title Senior Analyst Programmer- Platform Engineering Department FIL India Technology ISS Tech Location Gurgaon, India Level 3 Were proud to have been helping our clients build better financial futures for over 50 years. How have we achieved thisBy working together - and supporting each other - all over the world. So, join our ISS team and feel like youre part of something bigger. About your team Investment Management Technology provides systems development, implementation and support services for our globalInvestment Management division. We support Fund Managers, Research Analysts and Traders in all of our internationallocations, including London, Hong Kong, Ireland & Tokyo. About your role CRD delivery team needs highly motivated self-driven Analyst Programmer to provide Platform Support. The CRD platform consists of the Charles River product, CRD Integration Layer, PaaS and Kubernetes Services. CRD Platform is Fidelitys core trading platform, used by Portfolio Managers, Traders, Compliance and Post Trade. The core elements of the role are as follows: Platform Engineering - Primary objective of platform engineering is to focus on future planning and design of platform to maintain long term sustainability and supportability. Non-Production Incident management - Troubleshoot non-production issues and find root cause through analysis. Non-Production Support & Operations - Perform routine operational tasks such as critical batch monitoring, morning checks on applications readiness for business use, health check reports, maintenance etc Problem management & Change management - Identify and drive the changes required to bring stability on non-prod environments; Participate in Application releases, Infrastructure changes, Preventive maintenance activities like DR role swaps. About you Seasoned IT software delivery professional with an experience of 5+ years of relevant industry experience in supporting IT applications. Hands on experience on Unix scripting, Oracle & SQLServer, scheduling tools - Autosys and Control-M, IBM MQ, Kubernetes and Python. Understanding of DevOps concepts, Jenkins, Urban Deploy, JIRA and Power BI. Knowlege of Financial Domain (Investment Banking / Wealth Management) and understanding of Fixed Income and Equity Trading, Trade flow and Fund Management and FIX connectivity and infrastructure. Feel rewarded For starters, well offer you a comprehensive benefits package. Well value your wellbeing and support your development. And well be as flexible as we can about where and when you work finding a balance that works for all of us. Its all part of our commitment to making you feel motivated by the work you do and happy to be part of our team. For more about our work, our approach to dynamic working and how you could build your future here, visit careers.fidelityinternational.com.

This role involves the development and application of engineering practice and knowledge in the following technologiesElectronic logic programs (FPGA, ASICs); Design layout and verification of integrated circuits (ICs),printed circuit boards(PCBs), and electronic systems; and developing and designing methods of using electrical power and electronic equipment; - Grade Specific Focus on Electrical, Electronics Semiconductor. Develops competency in own area of expertise. Shares expertise and provides guidance and support to others. Interprets clients needs. Completes own role independently or with minimum supervision. Identifies problems and relevant issues in straight forward situations and generates solutions. Contributes in teamwork and interacts with customers.

As a Hardware at , you ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable customers to make better decisions quicker on the most trusted hardware platform in today s market. Your role and responsibilities As Logic deisgn engineer for Power Management, you will be responsible for design and development of power management and sustainability features for high performance Processors chips. 1. Lead the Development of features - propose enhancements to existing features, new features, architecture in High level design discussions 2. Develop micro-architecture, Design RTL, Collaborate with the Verification, DFT, Physical design, FW, SW, Research teams to develop the feature 3. Guide junior engineers. Represent as Power engineer in various forums. 4. Signoff the Pre-silicon Design that meets all the functional, area and timing goals 5. Participate in silicon bring-up and validation of the hardwar 6. Estimate the overall effort to develop the feature and close design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 3-8 years of work experience of one or more areas Power management Architecture/ microarchitecture/ Logic design - Deep technical understanding of dynamic power saving, power capping, droop mitigation techniques. 1. Experience of working on Power Management designs handling Power/Performance States, Stop states of Core and Cache, Chip and System thermal management and power supply current over-limit management 2. Experience in working with research, architecture/ FW/ OS teams 3. Experience in low power logic design 4. Experience in working with verification, validation for design closure including test plan reviews, verification coverage 5. Good understanding of Physical Design, and able to collaborate with physical design team for floor-planning, placement of blocks for achieving high- performance design and timing closure of high frequency designs 6. Experience in silicon bring-up ABOUT BUSINESS UNIT