Posted:1 week ago|
Platform:
Work from Office
Full Time
What Youll Work On: Develop and execute UVM-based testbenches for IP/SoC verification Write test plans, assertions, and coverage to ensure design quality Debug issues in simulation and collaborate with design & DFT teams Work on block-level and system-level verification Use tools like VCS, Questa, Verdi, Jasper , etc. What We’re Looking For: 3+ years of hands-on experience in UVM/RTL verification Strong understanding of verification methodology, SystemVerilog, SVA Experience with debugging tools and coverage analysis Solid scripting skills (Python/TCL/Perl) a big plus Exposure to complex SoCs or multi-clock domain verification is a bonus
Incise Infotech
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