30 Ufs Jobs - Page 2

General Summary: Seeking a Verification Engineer to manage verification of high-speed IPs such as UFS, Ethernet, and PCIe within SoC projects. The role involves understanding design specs, defining verification scope, creating test plans, implementing system Verilog assertions, and ensuring design correctness through rigorous verification. Key Responsibilities: Analyze design specifications and develop comprehensive verification plans. Implement and analyze SystemVerilog assertions and coverage metrics (code, toggle, functional). Collaborate with architects, designers, and both pre- and post-silicon teams to resolve issues. Use verification tools (VCS, waveform analyzers) and third-party VIPs (e.g., Synopsys VIPs). Develop and execute tests in UVM environment combining native Verilog, SystemVerilog, and C/C++. Work with scripting languages including Shell, Makefile, and Perl to automate and manage workflows. Apply strong debugging and problem-solving skills to identify and fix design issues. Maintain adherence to quality standards and best verification practices. Minimum Qualifications: Bachelor's or Master's degree in Computer Science, Electrical/Electronics Engineering, or related field. 3+ years of relevant hardware verification experience (IP or SoC level). Experience with UFS, Ethernet, PCIe protocols preferred. Proficiency in SystemVerilog, UVM, and C/C++. Familiarity with AXI-AMBA protocols and ASIC design flow concepts. Skilled in scripting for verification environments (shell, Perl). Experience with verification tools (VCS, waveform analysis, VIPs).

Job Area: Engineering Group, Engineering Group > Hardware Applications Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Application Engineer, you will provide technical expertise of hardware through trainings, product demonstrations, and the design, debug, test, and quality support of customer products. Qualcomm Hardware Application Engineers collaborate with cross-functional teams to assess the potential application of company products that meet and exceed customer needs. Minimum Qualifications: "¢ Bachelor's degree in Electrical/Electronics Engineering, Computer Engineering, or related field and 2+ years of Hardware Applications Engineering or Hardware Design experience or related work experience. OR Master's degree in Electrical/Electronics Engineering, Computer Engineering, or related field and 1+ year of Hardware Applications Engineering or Hardware Design experience or related work experience. OR PhD in Electrical/Electronics Engineering, Computer Engineering, or related field. IOT JD Title IOT Applications Engineering "“ Senior Engineer Job Function Qualcomm is seeking candidates to assist its customers in designing IoT solutions utilizing Qualcomm hardware and software. The individual will contribute to the dynamic Customer Engineering team for product designs and will be responsible for supporting Qualcomm's expanding portfolio of platforms and applications. This role involves collaborating closely Qualcomm customers to support hardware design sign-offs, system/PCB/chip-level debugging, and ownership of design collaterals that helps customers to bring out products faster. Preferred Qualifications A strong understanding of Digital/baseband HW design and PCB design is required. Good troubleshooting skills with the ability to analyze and debug during board bring up (boot-up) are essential. An understanding of LDO/SMPS is essential, along with experience in power management for portable devices being advantageous. Solid knowledge in High-Speed digital interfaces, such as memory Bus I/F (UFS, eMMC, LPDDR, NAND), Display interfaces (parallel and serial, preferably MIPI DSI), Camera interfaces (parallel and serial, preferably MIPI CSI), High Speed peripherals (USB, SDC, PCIe, Ethernet), and Standard Peripheral interfaces (UART, SPI, I2C, JTAG, HDMI) are necessary. Experience with Digital HW/baseband systems and board-level design, as well as familiarity with Digital ASICs and system design, is important. Understanding of system-level clocking schemes, interface-level handshakes are necessary A strong understanding of mobile and consumer electronics products is needed. Hands-on experience with oscilloscopes, logic analyzers, test and measurement tools are required. Basic knowledge of ARM processors and experience with JTAG emulators, display drivers, and memory is preferable. Knowledge of multi-core system/inter-chip system design is advantageous. A strong understanding of PCB signal/power integrity is necessary Must be comfortable in reviewing schematics and suggesting improvements is required. Experience with schematic entry is a plus. Must have knowledge to review PCB layout in various CAD tools like Cadence Allegro, Siemens Mentor Graphics suite. Knowledge of multi-layer PCB designs, vias, and stack-up configuration is essential. The ability to interact with multi-geography customers and stakeholders is desired. Knowledge of prototyping platforms like Arduino and Raspberry Pi is beneficial. About The Role As a member of Qualcomm's Customer Engineering team, responsibilities include creating chip and chipset documentation, reference schematics, and training materials for global customer support. Candidate will assist with hardware design reviews, respond to technical queries, and troubleshoot designs at the system, SoC, and PCB levels. A minimum of 3 years' relevant experience is required, along with skills in hardware, digital/high speed/power management, and Silicon validation. Keywords Board Design, Board bring up, UFS, LPDDR, NAND, eMMC, MIPI, USB, UART, SPI, I2C, Logic Analyzer, PADS, Allegro, LDO, SMPS, Clocks, Crystal, ARM processor, JTAG Educational Requirements RequiredBachelor's, Electronics and/or Electrical Engineering PreferredMaster's, Electronics and/or Electrical Engineering

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As verification engineer candidate will be responsible to manage UFS/Ethernet/PCIe/high speed IP verification at one or more SoC (System On Chip) during project work. Responsibilities Understand the design specification and implementation, define the verification scope, develop test plans, tests, and the verification infrastructure and verify the correctness of the design. Responsible to implement and analyze system Verilog assertion and coverage(code, toggle, functional) . Work alongside other members of the verification team to analyze, develop and execute verification test cases and able to provide relevant solution to issue. Collaborate with architects, designers, and pre and post silicon verification teams to accomplish your tasks. Adhere to quality standards and good test and verification practices. B.E/B. Tech/M.E/M. Tech in electronics with 5+ year experience in verification domain. Prior work experience on IP level or Soc level. Prior work on UFS (Universal Flash Storage),Ethernet and PCIe Protocol is desirable. Good understanding of processor based Soc level verification which includes native ,Verilog ,system Verilog and UVM mix environment. Hand on experience with verification tools such as VCS, waveform analyzer and third party VIP integration (such as Synopsys VIPs). Hands on experience in UVM. C/C++ ,System Verilog verification language. Good understanding of AXI-AMBA protocol variants. Can work with scripting language (shell, Makefile, Perl ) Strong understanding of design concepts and ASIC flow. Good problem solving , analytical and debugging skill is must. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Mandatory Skills: 1. Engineer with 5+ years of experience in Windows driver framework. 2. Strong C/C++ development skills with a good understanding of object-oriented design. 3. Good debugging skills, knowledge in using debug tools like WinDbg and BSOD analysis. 4. Good knowledge in OS internals, x86/ARM System architecture and system buses like PCIE/SATA/USB/I2C/SPI & I/O Subsystems. 5. Strong background in embedded systems development and bringup. 6. Experience with low-level hardware device programming 7. Experience with Multimedia & Graphics architecture. Good to have: Understanding of different Windows OS versions. Knowledge in Linux development Good written and verbal communication skills. Self-motivated, should be able to take lead in mastering new technologies. Should be able to work as an individual or team member.

As a RTL Design lead, first time bug free RTL from requirement or specification gives you a dopamine rush. Finding an alien life is a complex challenge, however, millions of bug free lines of RTL gives much more satisfaction. We are looking for an expert like you, having done multiple tape-outs, driven the design effort for complex IP/Subsystem/SoC blocks. Verification Lead: As a Verification lead, it is always a fun to catch bugs and ensuring that the design intent is met. Imagine your chip on a space telescope and sending beautiful images of galaxy - verification is the key to avoid white spots mixing with stars. We are looking for an expert like you, having lead multiple tape-outs, closed the verification of complex IP/Subsystem/SoC blocks. Job role and Skill set - Design role: Senior RTL Subsystems Designer Lead role. With 8+ years of experience. Must be able to drive the Subsystem life cycle from requirement to final release(s) phase(s), crafting the functional specification, defining the micro-architecture, coding the RTL with best practices, driving RTL quality checks and working with Verification and implementation teams, and, all the way to release(s). Proficiency with standard protocols like PCIe, DDR, UFS, USB, AMBA etc., Hands-on experience with low power design. Understanding of DFT requirements and architecture. Working with cross-functional teams and driving the projects to completion. Job role and Skill set - Verification role: Senior Verification lead role. With 8+ years of experience. Must be able to drive the complete Verification cycle : crafting the test plan, architecting the verification environment, developing the test infrastructure and executing the plan, driving to closure with coverage. Proficiency with Functional Verification of standard protocols like PCIe, DDR, UFS, USB, AMBA etc., Power aware Verification with UPF. Gate Level Verification hands-on experience is a value add. Working with cross-functional teams and driving the projects to completion.