22 Timing Convergence Jobs

Role Overview: Are you ready for a challenging career that also brings a sense of accomplishment At Ambit, you will find the perfect platform to excel and advance in the field of semiconductor design. Enjoy the freedom to work in your unique way while receiving the necessary support to learn and enhance your skills. Ambit believes in fostering innovation by empowering its employees to experiment and create. The vibrant work environment reflects the management's dedication to its people and their values. Join Ambit today for a promising future in semiconductor design services. Key Responsibilities: - Develop micro-architecture at IP/sub-system level and perform RTL coding. - Create timing con...

In this role at Ambit, you will be responsible for IP / sub-system level micro-architecture development and RTL coding. Your key responsibilities will include: - Prepare block/sub-system level timing constraints. - Integrate IP/sub-system. - Perform basic verification either in IP Verification environment or FPGA. - Deep knowledge of mixed signal concepts - Deep knowledge of RTL design fundamentals - Deep knowledge of Verilog and System-Verilog - Synthesis, Equivalence Checking, Clock-Domain Crossing (CDC) Analysis, Area/Power optimizations, Linting, Power intent, Static Timing Analysis (STA) - Write design specifications for different functional blocks on a chip, create micro-architecture d...

As a Hardware Engineer at Qualcomm India Private Limited, you will play a crucial role in planning, designing, optimizing, verifying, and testing electronic systems for cutting-edge products. You will collaborate with cross-functional teams to meet performance requirements. Your responsibilities will include: - Plan, design, optimize, verify, and test electronic systems - Bring-up yield, circuits, mechanical systems, and various digital/analog/RF/optical systems - Develop test systems, FPGA, and/or DSP systems for launching world-class products Qualifications required for this role include: - Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field with 2+ ...

Job Overview: Physical Design Engineer implements the entire ASIC/SoC back end design flow from RTL to GDSII to create design databases ready for manufacturing with a special focus on power, performance & area optimization with next generation state of the art process technologies. Physical Design Engineer Experience: 5 Years & above (Mandatory). Education: BE/ ME/B. Tech/M. Tech/MS or equivalent disciplines with an emphasis on VLSI design Location: Bengaluru, India EMPLOYMENT TYPE: FULL TIME Roles & Responsibilities: - Take complete ownership of the implementation of Block level designs and Chip level design - Responsible for planning and execution of all aspects of Physical Design includin...

As a Qualcomm Hardware Engineer at Qualcomm India Private Limited, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, Digital/Analog/RF/optical systems, and more to launch cutting-edge products. You will collaborate with cross-functional teams to meet performance requirements and develop innovative solutions. **Key Responsibilities:** - 3 to 5 years of experience in static timing analysis, constraints, and other physical implementation aspects - Strong grip on STA fixing aspects for solving critical timing and clock path analysis - Experience in preparing complex ECOs for timing convergence across a wide range...

As a Physical Design Engineer at Qualcomm India Private Limited, you will be responsible for the physical implementation activities for sub-systems, including floor-planning, place and route, clock tree synthesis, formal verification, physical verification (DRC/LVS), power delivery network, timing closure, and power optimization. You will need to have a good understanding of PD implementation of PPA critical cores and be able to make appropriate PPA trade-off decisions. Additionally, knowledge in timing convergence of high-frequency data-path intensive cores and advanced STA concepts is essential. You should also be proficient in block-level PnR convergence with tools like Synopsys ICC2/Cade...

Job Requirements We are looking for a highly experienced and technically strong Senior Lead Physical Design Engineer with 12+ years of hands-on expertise on complex block or subsystem-level physical design on complete RTL to GDSII activities and must be passionate about driving power and area efficiency, methodology innovation, and signoff convergence. Key Responsibilities: Drive RTL-to-GDSII activities including synthesis, floor planning, power planning, , placement, CTS, routing, and signoff tasks. Experience on multi-voltage and multi-power domain designs using UPF and low power verification (VCLP/CLP) Perform dynamic and leakage power analysis (using PTPX) and optimization across design ...

Role Overview: Job Title : PNR Lead Experience : 8+ Years Work location : Bangalore Job Description: Technical Skills: Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage design Deep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks and signoff DRC/LVS closure Responsible for independent planning and execution of all aspects of physical design including floor planning, place and route, Clock Tree Synthesis, Clock Distribution, extraction, Timing closure, Power and Signal Integrity Analysis, Physical Verification, DFM Must have participated in all stages of the de...

Role: PD Lead Experience: 7+yrs Location: Bangalore Technical Skills: Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage design Deep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks and signoff DRC/LVS closure Responsible for independent planning and execution of all aspects of physical design including floor planning, place and route, Clock Tree Synthesis, Clock Distribution, extraction, Timing closure, Power and Signal Integrity Analysis, Physical Verification, DFM Must have participated in all stages of the design (floor planning, placement, CTS, routing, ph...

As a Qualcomm Hardware Engineer, you will be involved in planning, designing, optimizing, verifying, and testing electronic systems to launch cutting-edge, world-class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. Your responsibilities will include: - Strong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining and managing timing constraints, Latch transparency handling, 0-cycle, multi-cycle path handling - Hands-on experience with STA tools such as Prime-time and Tempus - Driving timing convergence at Chip-level and Hard-Macro level - In-depth knowledge of cross-talk noise, Signal Integrity, Layout Pa...

In this role at Ambit, you will be responsible for IP / sub-system level micro-architecture development and RTL coding. Your key responsibilities will include: - Prepare block/sub-system level timing constraints - Integrate IP/sub-system - Perform basic verification either in IP Verification environment or FPGA - Deep knowledge of mixed signal concepts - Deep knowledge of RTL design fundamentals - Deep knowledge of Verilog and System-Verilog - Synthesis, Equivalence Checking, Clock-Domain Crossing (CDC) Analysis, Area/Power optimizations, Linting, Power intent, Static Timing Analysis (STA) - Write design specifications for different functional blocks on a chip - Create micro-architecture dia...

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life's work , to amplify human creativity and intelligence. As an NVIDIAN, you'll be immersed in a diverse, supportive environment where everyone is inspired to do thei...

In this role, you will be leading all block/chip level physical design activities. This includes tasks such as generating floor plans, abstract views, RC extraction, PNR, STA, EM, IR DROP, DRCs, and schematic to layout verification. Collaboration with the design team to address design challenges will be a key aspect of this position. You will also be assisting team members in debugging tool/design related issues and constantly seeking opportunities to enhance the RTL2GDS flow to improve power, performance, and area (PPA). Troubleshooting various design issues and applying proactive interventions will be part of your responsibilities. Your main responsibility will be overseeing all aspects of...

You will be responsible for Physical Implementation activities for sub systems, including Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure, and power optimization. Your role will involve ensuring good exposure to PD implementation of PPA critical Cores and making the right PPA trade-off decisions. You should possess knowledge in timing convergence of high-frequency data-path intensive Cores and advanced STA concepts. Additionally, familiarity with Block level PnR convergence using tools like Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus is essential. A good understanding of clocking architecture is required...

Qualcomm India Private Limited is a leading technology innovator that pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems. This includes a wide range of tasks such as bringing up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge, world-class products. Collaboration with cross-functional teams is essential to develop solutions and meet performanc...

Qualcomm India Private Limited is a leading technology innovator that pushes the boundaries of what's possible to enable next-generation experiences and drive digital transformation. As a Qualcomm Hardware Engineer, your responsibilities will include planning, designing, optimizing, verifying, and testing electronic systems. You will work on a variety of systems such as circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge, world-class products. Collaboration with cross-functional teams is essential to develop solutions and meet performance requirements. The ideal candidate for this role should ...

Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Lead MTS Physical Design Engineer to join our MIC Design IDC team in Bangalore. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work. Responsibilities Complete ownership of Static timing analysis at full chip level for high speed mixed signal design Experience doing multi-mode mu...

Qualcomm India Private Limited is a leading technology innovator that pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, your responsibilities will include planning, designing, optimizing, verifying, and testing electronic systems. You will work on a variety of systems such as circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge, world-class products. Collaborating with cross-functional teams, you will develop solutions to meet performance requiremen...

#HCLTech is seeking a skilled Physical Design Engineer for an exciting opportunity! Key Requirements: - 5+ years of experience in Timing analysis, timing convergence, SI/Noise analysis, and Signoff quality - Proficiency in multi-voltage scenarios design and STA closure on Low power designs - Familiarity with industry standard EDA tools like Primetime - Hands-on experience in Physical Design implementation is a bonus - Skill in scripting languages such as Perl and Tcl for automation - Knowledge of 16/14/10/7/5nm nodes - Understanding of computer organization/architecture is advantageous - Strong problem-solving abilities and attention to detail - Excellent communication skills and ability to ...

You should be a PNR Lead with over 8 years of experience, based in Bangalore. Your role will involve handling Full chip PnR tasks such as timing, congestion, and CTS issues, with an understanding of IO ring, package support, and multi-voltage design. It is crucial to have a deep understanding of synthesis, place & route, CTS, timing convergence, IR/EM checks, and signoff DRC/LVS closure. Your responsibilities will include independently planning and executing all aspects of physical design, such as floor planning, place and route, Clock Tree Synthesis, Clock Distribution, extraction, Timing closure, Power and Signal Integrity Analysis, Physical Verification, and DFM. You must have experience ...

As the SOC Verification Lead, you will be responsible for coordinating with SOC (Design, DFT, PD), System, and SW engineering teams to drive and lead SOC verification execution. You will take ownership of multiple SOC verifications within the targeted functional domain. Your role will involve collaborating with customers on feature requirements, use case scenarios, and test plan reviews to ensure that the SOC meets all functional aspects of the targeted domain. Additionally, you will work closely with the architecture and design team on high-level architecture and use case scenarios, as well as the configuration space. Collaboration with the IP team for IP requirements and deliverables will ...

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our lifes work , to amplify human creativity and intelligence. As an NVIDIAN, youll be immersed in a diverse, supportive environment where everyone is inspired to do their ...