Posted:1 day ago|
Platform:
On-site
Full Time
#HCLTech is seeking a skilled Physical Design Engineer for an exciting opportunity!
Key Requirements:
- 5+ years of experience in Timing analysis, timing convergence, SI/Noise analysis, and Signoff quality
- Proficiency in multi-voltage scenarios design and STA closure on Low power designs
- Familiarity with industry standard EDA tools like Primetime
- Hands-on experience in Physical Design implementation is a bonus
- Skill in scripting languages such as Perl and Tcl for automation
- Knowledge of 16/14/10/7/5nm nodes
- Understanding of computer organization/architecture is advantageous
- Strong problem-solving abilities and attention to detail
- Excellent communication skills and ability to collaborate across diverse teams
Join us at #HCLTech for this challenging opportunity in Physical Design Engineering! #EngineeringJobs #fullchiptiming
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