Synthesis/STA Engineer (Applications Engineering)

Job Description

You will be part of the industry s leading SDC Management product engineering team. Responsibilities include working with customers to ensure that our SDC Constraints solution meets their expectations; working on design methodologies that integrate our SDC constraints solution with other Synopsys products. You will track customer engagements, communicate status with Marketing and Upper Management. You will prepare and deliver technical presentations to customers, FAEs. You will develop customer training material related to our SDC Constraints solution. You will routinely meet with customers and communicate their key priorities internally. You will provide technical direction to our R&D team, champion and prioritize key customer requests. Desired Skills and Experience: Proficiency with STA, SDC. Proficiency with RTL, System Verilog. Strong understanding of front-end EDA design methodologies. Strong Perl, Tcl or Python scripting skills. Prior experience with logic synthesis tools is required. Prior experience using or supporting SDC tools would be a significant plus. Prior experience with RTL simulation, SVA would be a plus. Prior experience supporting front-end EDA tools would be a plus. Sound communication skills, verbal and written. Ability to produce product requirement documents. BS EE/CE. 4 years experience with STA/Synthesis.