Synthesis Design Engineer

As a Silicon Design Engineer 2 at AMD, your role is crucial in executing the front end implementation of sub-blocks or IP. You will be responsible for tasks such as synthesis, LEC, CLP, prelayout STA, and postlayout STA/Timing closure. Collaborating with the design team and PNR teams is essential to achieve closure and execute tasks as per schedule. Your key responsibilities include ensuring quality delivery for synthesis and timing closure, as well as debugging and resolving technical issues efficiently. The ideal candidate for this role should have experience in synthesis and timing closure, with additional experience in LEC and CLP being a plus. Handling blocks with complex designs, high-frequency clocks, and complex clocking should be within your expertise. A complete understanding of timing constraints, low power aspects, and concepts of DFT is necessary, along with the ability to debug and resolve issues effectively. Proficiency in scripting and automation will be beneficial in this role. To qualify for this position, you should hold a Bachelor's degree with 2 years of experience or a Master's degree with 1 year of experience in Electrical Engineering. Your academic credentials will play a significant role in showcasing your eligibility for this role at AMD. Join us at AMD, where together we advance technology and strive for innovation to solve the world's most important challenges. Your contributions as a Silicon Design Engineer 2 will be instrumental in building great products that shape next-generation computing experiences across various domains such as the data center, artificial intelligence, PCs, gaming, and embedded systems. Let's push the limits of innovation and make a difference in our industry, communities, and the world.,