58 Clp Jobs

General Summary: Experience : 2 to 20 years Qualcomm's Bangalore WLAN PHY (Baseband) team is seeking VLSI Digital Design Engineers to lead IP development for the latest WiFi standards. Our WLAN PHY team, comprised of highly passionate and seasoned domain experts, prides itself on years of experience in taking WLAN PHY designs from concept to silicon independently. WLAN PHY team is responsible for delivering the end-to-end Tx/Rx DSP chains all the way from antenna samples post ADC to raw bits for upper layers and on the reverse path from raw bits to DAC. The team specializes in working with challenges of practical high-speed wireless communication systems and finding innovative solutions to counter them. The team works extensively on typical signal processing functions like filters, matrix transformations (e.g.: QR, Cholesky decomposition), channel estimation, equalization (MMSE, MRC, ML), decoders/encoders (e.g.: LDPC, Viterbi) , demodulators, FFT etc. on a day-to-day basis, and contributes to the development/ enhancement/ evaluation of signal processing algorithms to cater to new requirements. We are looking for someone as passionate as us and takes pride in their work. WiFi's ubiquity in modern times is undeniable, and the IEEE 802.11 Working Group is continually developing new standards to satisfy the growing demand for high throughput and low-latency real-time applications, such as VR and AR. Qualcomm is at the forefront of the WiFi revolution, aiming to become the global leader in WiFi chip solutions. The WLAN PHY team in Bangalore is instrumental in realizing this vision. Requirements: Looking for a candidate with 1 to 3 years of hands-on experience in micro-architecting and developing complex IPs. Expertise in digital design, VLSI concepts, and experience in creating power/area-efficient IPs across multiple clock domains are essential. Proficiency in RTL coding and familiarity with RTL QA flows such as PLDRC, CDC, and CLP (optional) is expected. Candidates should be capable of proposing design alternatives to meet area/power/performance specifications and presenting these options for review. Experience in leading, guiding, or managing junior team members is advantageous. Repeated success in taking IP designs from requirements to silicon is required. While not mandatory, having developed IPs for wireless technologies (WLAN, LTE, NR, BT, UWB, etc.) or past HLS experience would be beneficial. Skills: Must have: Proficient in Verilog RTL coding, uArch, CDC check, PLDRC, Timing constraints, Python/Perl. Experience in design/debugging complex data-path/control-path IPs. Good communication, analytical & leadership skills. Good to have: System Verilog, Visio, Knowledge of signal processing concepts/algorithms and Wi-Fi standards (802.11a/b/g/n/ac/ax), experience with HLS. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Responsibilities/job duties Memory Frontend Model development/verification/delivery/debug/Automation Memory Front End team introduction: At Qualcomm memory team, we specialize in front-end modeling for a wide range of memory IPs. This includes various architectures such as single-port memories, pseudo dual-port designs, register files, CPU memories, and complex custom memories developed from the ground up. Each IP development undergoes comprehensive verificationcovering functional, formal, BIRA, and DFT domainsand is rigorously validated through an extensive QA suite to ensure alignment with the actual memory circuit implementation Qualifications Masters in Electronics and communication Engineering or Electrical Engineering or related field with 0-2 years experience. In this position candidate will be part of memory FrontEnd modelling team where he/she will be responsible for below: Design and implement behavioral models in Verilog/System Verilog for compiler-generated and custom memory components. Maintain and enhance memory compilers to ensure accurate generation of behavioral Verilog models. Develop and support LVLIB and MASIS models for memory BIST (Built-In Self-Test) applications. Create FPGA-compatible models tailored for emulation platforms. Build DFT (Design-for-Test) and Fast Scan models to support comprehensive test coverage. Execute signoff simulations for both functional and formal verification across all compiler and custom memory models. Run comprehensive QA suites to validate that all memory models accurately reflect the intended circuit implementations. Develop and maintain signoff verification tools and QA automation frameworks for memory model validation. Conduct post-release QA checks to ensure model quality and reliability. Manage customer releases , ensuring readiness and documentation. Provide support to SoC teams , assisting with debugging and resolving memory interface issues related to the models. In this position, candidates should have below understating and hands on experience: Strong understanding of memory architecture and functionality. Solid grasp of CMOS low-power circuit design principles. Proficient in simulation tools such as Vsim, VCS, Finesim, and CustomSim. Deep expertise in Verilog and System Verilog coding practices. Familiarity with BIST modeling frameworks like LVLIB and MASIS. Good working knowledge of CLP and Static Timing Analysis (STA). Experience with Unix, Shell scripting, Perl, and Python is a plus. Excellent communication and collaboration skills.

You will lead the development and maintenance of applications using AS/400 Synon RPG AS400/COBOL and CLP, providing technical guidance and support to ensure high-quality deliverables. Collaborating with cross-functional teams, you will gather and analyze requirements for new features and enhancements, ensuring solutions adhere to industry standards and best practices. Conducting code reviews, you will offer constructive feedback to enhance code quality and troubleshoot and resolve complex technical issues promptly. Your responsibilities will also include developing and maintaining technical documentation, participating in project planning and execution, monitoring system performance, and engaging with stakeholders to provide technical solutions aligned with business objectives. Keeping updated with industry trends, you will contribute to the continuous improvement of development processes and methodologies. To excel in this role, you should possess strong expertise in AS400/COBOL Synon AS/400 RPG and CLP, along with excellent problem-solving and analytical skills. Effective communication and interpersonal abilities, a proactive approach to learning new technologies, and the ability to work effectively in a hybrid model are essential. Attention to detail and accuracy should be maintained at a high level.,

Role Purpose 6+ Years Hands-on expertise RPG400/IV, RPG Free, CL, SQL, Embedded SQL, Query & ILE Recent and advanced experience with RPG (ILE/FREE) using Procedures, Service Programs, and Functions Hands-on experience of Application Design & Development in BFSI/Banking domain is desirable Experience exposing and consuming web services, JSON, REST APIs is desirable Change management experience and familiarity with a change management tool Understanding of DevOps concepts and techniques Strong understanding and working experience with CI/CD and available tools i.e. usage of Jenkins, Sonar, RDI Working experience in an agile environment Ability to quickly acquire new skills and tools Ability to resolve critical issues in timely manner Be a clear communicator, document your work, share your ideas Review and be reviewed by your peers Experience releasing to production what you developed and then supporting it

About The Role Role Purpose The purpose of this role is to design, test and maintain software programs for operating systems or applications which needs to be deployed at a client end and ensure its meet 100% quality assurance parameters About The Role AS400 Developer 5+ years of experience in IBM AS400/iSeries Application development and Maintenance Expertise in IBM AS400/iSeries technology which includes RPG, CL, ILE, Free Format, SQLRPGLE, DB2/400 Good technical/functional knowledge and should be able to understand production issues and provide solutions Expertise in AS400 tools and products like ROBOT, IBM Job Scheduler and Change Management tools Should have experience on WRKQRY and SQL, JOB ,JOBQ and subsystem Experience in Incident management, problem management, Daily system monitoring and Break-fix solution for defects Provide technical support to end-users of AS400 applications Excellent problem-solving and analytical skills Mandatory Skills: AS400 . Experience3-5 Years . Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

Job Summary JP ID : UHGOFOPX0000124 We are seeking a Technical Lead with 6 to 8 years of experience to join our team. The ideal candidate will have expertise in AS/400 Synon RPG AS400/COBOL and CLP along with domain experience in Medicare & Medicaid Claims and Payer. This hybrid role requires a proactive individual who can drive technical excellence and contribute to our mission of improving healthcare systems. Responsibilities Lead the development and maintenance of applications using AS/400 Synon RPG AS400/COBOL and CLP. Oversee the technical aspects of projects related to Medicare & Medicaid Claims and Payer. Provide technical guidance and support to team members to ensure high-quality deliverables. Collaborate with cross-functional teams to gather and analyze requirements for new features and enhancements. Ensure that all developed solutions adhere to industry standards and best practices. Conduct code reviews and provide constructive feedback to improve code quality. Troubleshoot and resolve complex technical issues in a timely manner. Develop and maintain technical documentation for all projects and processes. Participate in the planning and execution of project timelines and deliverables. Monitor system performance and implement optimizations as needed. Engage with stakeholders to understand their needs and provide technical solutions that meet business objectives. Stay updated with the latest industry trends and technologies to ensure the team remains at the forefront of innovation. Contribute to the continuous improvement of development processes and methodologies. Qualifications Possess strong expertise in AS400/COBOL Synon AS/400 RPG and CLP. Have in-depth knowledge of Medicare & Medicaid Claims and Payer domains. Demonstrate excellent problem-solving and analytical skills. Exhibit strong communication and interpersonal abilities. Show a proactive approach to learning and adapting to new technologies. Display the ability to work effectively in a hybrid work model. Maintain a high level of attention to detail and accuracy.

As an Info Technology Analyst at NTT DATA in Noida, Uttar Pradesh (IN-UP), India, you will be required to have excellent knowledge in AS/400 system with a minimum of 3 to 5 years of experience. Your role will involve utilizing programming language skills such as RPG, RPGLE, CLP, CLLE, SQL, SQLRPGLE for a minimum of 3 to 5 years. Additionally, you will be responsible for job handling and monitoring, having knowledge of Journaling, Triggers, SFTP, and FTP. The role will require you to be willing to work on oncall support in a 24*7 shift model, covering morning, evening, and night shifts. You should possess strong analytical and problem-solving skills, along with excellent communication skills. It would be beneficial to have production support knowledge, including familiarity with ITSM tools like ServiceNow. NTT DATA is a trusted global innovator of business and technology services, with a commitment to helping clients innovate, optimize, and transform for long-term success. As a Global Top Employer, NTT DATA has diverse experts in more than 50 countries and a robust partner ecosystem. The services provided include business and technology consulting, data and artificial intelligence, industry solutions, as well as the development, implementation, and management of applications, infrastructure, and connectivity. Join us at NTT DATA to be part of a dynamic and forward-thinking organization that values inclusivity and adaptability. Apply now to grow your career with us and be a part of our innovative team.,

Qualcomm India Private Limited is seeking a Senior or Lead Hardware Engineer with 3-5 years of experience in Power fundamentals, PTPX, CLP, design verification, RTL coding, synthesis, physical design, as well as protocol knowledge of DDR, CHI, Cache, computer organization, and bus protocol. The ideal candidate should have a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field with 3+ years of Hardware Engineering experience, or a Master's degree with 2+ years of experience, or a PhD with 1+ year of experience. Qualcomm is an equal opportunity employer and is committed to providing accessible processes for individuals with disabilities. In case of disability, accommodations can be requested by emailing disability-accommodations@qualcomm.com or calling Qualcomm's toll-free number. Reasonable accommodations will be provided to support individuals with disabilities during the hiring process. Employees at Qualcomm are expected to adhere to all applicable policies and procedures, including those related to security and protection of confidential information. The company is dedicated to creating an accessible workplace for individuals with disabilities. Please note that Qualcomm's Careers Site is intended for individuals seeking a job at Qualcomm. Staffing and recruiting agencies, as well as individuals being represented by an agency, are not authorized to use the site for submissions. Unsolicited resumes or applications from agencies will not be accepted. For more information about this role, please reach out to Qualcomm Careers.,

You will collaborate with cross-functional teams to ensure seamless integration of new technologies and processes. Provide technical guidance and support to team members fostering a collaborative and innovative work environment. Ensure all projects adhere to industry standards and regulatory requirements maintaining the highest level of quality and security. Manage project timelines and resources effectively to ensure timely delivery of solutions. Evaluate and recommend new technologies and tools to enhance productivity and efficiency within the team. Monitor and report on project progress identifying and mitigating risks to ensure successful outcomes. Facilitate communication between stakeholders to ensure alignment on project goals and deliverables. Develop and implement strategies to optimize software performance and scalability. Drive continuous improvement initiatives to enhance the team's capabilities and overall project outcomes. Support the hybrid work model by coordinating remote and on-site activities to maximize team productivity. Ensure the team's adherence to best practices in software development and project management. Qualifications: - Possess strong technical expertise in AS/400 RPG COBOL/400 DB2/400 and CLP essential for developing robust software solutions. - Exhibit excellent problem-solving skills and the ability to make informed decisions under pressure. - Show proficiency in managing hybrid teams ensuring effective collaboration and communication. - Have a proven track record of delivering projects on time and within budget showcasing strong project management skills. - Display strong interpersonal skills capable of fostering a positive team environment and building relationships with stakeholders. - Demonstrate a commitment to continuous learning and staying updated with the latest industry developments.,

Qualcomm India Private Limited is a leading technology innovator that aims to create a smarter, connected future for all by pushing the boundaries of what's possible. As a Qualcomm Hardware Engineer in the Engineering Group > Hardware Engineering, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems. This includes working on a wide range of systems such as circuits, mechanical systems, Digital/Analog/RF/optical systems, FPGA, and/or DSP systems to develop cutting-edge products. Collaboration with cross-functional teams is essential to meet performance requirements and deliver innovative solutions. The Low Power CAD Engineer position at Qualcomm involves optimizing power domains and enhancing system-level power modeling using advanced technologies like AI, ML, and 3DIC. Key responsibilities include: - Developing advanced Low Power flows and methodologies for estimation, optimization, and signoff - Architecting AI & ML-driven LP flows to improve efficiency and scalability - Collaborating with SoC and Subsystems teams for seamless deployment of robust LP methodologies - Working with EDA tool providers (Synopsys, Cadence) to support emerging technologies in Automotive, AI/ML, and 3DIC - Integrating Low Power methodologies from RTL to final tape-out stages of chip design - Analyzing power reduction strategies for high-performance computing, AI accelerators, and edge devices - Utilizing expertise in Python and Perl for programming & automation to enhance workflow efficiency - Applying strong knowledge of Unified Power Format (UPF) and hands-on experience with CLP/VCLP tools for Low Power static verification - Implementing power estimation and optimization tools like Synopsys PrimeTime PtPx and Ansys Power Artist - Spearheading improvements in Low Power methodology development and ensuring global deployment - Engaging with EDA vendor R&D teams for tool enhancement and debugging - Evaluating next-generation power tools and leading deployment efforts - Communicating complex power concepts effectively through technical communication and collaboration - Operating in a fast-paced environment, requiring strong communication, planning, and execution skills while collaborating with various teams. Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. The company expects its employees to adhere to all applicable policies and procedures, including security measures and confidentiality requirements. Staffing and recruiting agencies are advised not to submit unsolicited applications or resumes through the Qualcomm Careers Site. For further information about this role, please contact Qualcomm Careers directly.,

Project Role : Full Stack Engineer Project Role Description : Responsible for developing and/or engineering the end-to-end features of a system, from user experience to backend code. Use development skills to deliver innovative solutions that help our clients improve the services they provide. Leverage new technologies that can be applied to solve challenging business problems with a cloud first and agile mindset. Must have skills : Python (Programming Language), RPGLE, CLP Good to have skills : NAMinimum 7.5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Full Stack Engineer, you will be responsible for developing and engineering the end-to-end features of a system, from user experience to backend code. Your typical day will involve collaborating with cross-functional teams to design and implement innovative solutions that enhance client services. You will leverage new technologies and methodologies to address complex business challenges, all while maintaining a cloud-first and agile mindset. Engaging in problem-solving and continuous improvement will be key aspects of your role, ensuring that the systems you develop are efficient, scalable, and user-friendly. Roles & Responsibilities:- Expected to be an SME.- Collaborate and manage the team to perform.- Responsible for team decisions.- Engage with multiple teams and contribute on key decisions.- Provide solutions to problems for their immediate team and across multiple teams.- Mentor junior team members to enhance their skills and knowledge.- Continuously evaluate and improve development processes to increase efficiency. Professional & Technical Skills: - Must To Have Skills: Proficiency in Python (Programming Language).- Strong understanding of web development frameworks such as Django or Flask.- Experience with front-end technologies including HTML, CSS, and JavaScript.- Familiarity with database management systems like PostgreSQL or MySQL.- Knowledge of cloud services and deployment strategies. Additional Information:- The candidate should have minimum 7.5 years of experience in Python (Programming Language).- This position is based at our Pune office.- A 15 years full time education is required. Qualification 15 years full time education

More than 8+ years of IT experience of which atleast 2 years as Technical lead Must have - Worked as Technical lead with minm team size 4 or 5. - Software development & maintenance using SDLC & AGILE methodology - Experienced in doing Technical design for project - Experienced on ISeries platform using CLLE, RPGLE, DB2/400, SQL - Worked on programming using SQL RPG and Free format RPG - Worked on tools - JIRA, RDI (coding), RTC & ARCAD (software change control), Jenkins, HP Quality Centre, GSD - Worked on programming using MQ, Connect Direct, SFTP - Strong Analytical skills - Self starter, take ownership and flexible - Able to work under tight deadline and do multi tasking - Team player - Good in interpersonal and communication skills Prefer to have - Worked on Restful API development using IWS on ISeries platform - Worked on test automation tools (RPGunit, Xframework, TOSCA etc) - Worked on Banking application

Educational Requirements Master Of Science,Master Of Technology,Bachelor Of Science,Bachelor of Engineering,Bachelor Of Technology Service Line Application Development and Maintenance Responsibilities : Lead and mentor a team of AS/400 Developers in the design, development, and maintenance of web applications. Work with business stakeholders and technical teams to gather and analyze requirements for AS/400 applications. Design, develop, and enhance software solutions using AS/400 programming languages, including RPG IV, RPG Free, CL, and DDS. Write efficient and well-structured code to implement business logic and functionality on the AS/400 platform. Perform unit testing and debugging to ensure the quality and reliability of developed applications. Maintain and enhance existing AS/400 applications by troubleshooting issues, implementing bug fixes, and optimizing performance. Collaborate with other developers, database administrators, and system administrators to integrate AS/400 applications with other systems and databases. Develop and maintain technical documentation, including system design, coding standards, and user manuals. Stay updated with the latest AS/400 technologies and industry trends and recommend improvements or alternative solutions to enhance system performance and efficiency. Collaborate with cross-functional teams to support system integration, data migration, and software deployment activities. Participate in code reviews and provide constructive feedback to ensure adherence to coding standards and best practices. Proactively identify and address potential risks or issues related to AS/400 applications and propose appropriate solutions.Requirements: Bachelors degree in Computer Science, Information Technology, or a related field. Minimum of 5 years of experience as an AS/400 Developer, working on RPG IV, RPG Free, CL, and DDS, with at least 3 years of team handling experience Strong understanding of AS/400 programming concepts, including file handling, program flow control, and data manipulation. Proficiency in debugging and troubleshooting AS/400 applications to identify and resolve issues effectively. Experience with AS/400 development tools, such as SEU, PDM, and RDi. Familiarity with relational databases, particularly DB2 on the AS/400 platform. Knowledge of AS/400 performance tuning and optimization techniques. Ability to work independently and collaboratively in a team environment, with excellent problem-solving and analytical skills. Technical and Professional Requirements: Primary skills:Technology->AS,400 technologies->AS400 hardware setup Preferred Skills: Technology->AS/400 technologies->MQ Series with AS400

The ASIC/SOC Front End Design Engineer role involves setting up ASIC QA flows for RTL design quality checks, understanding top-level interfaces, clock structure, reset structure, RAMs, CDC boundaries, and power domains. You will be responsible for executing various design steps such as Lint, Synthesis, LEC, Static timing analysis, CDC, RDC, DFT, and CLP. Additionally, you will create clock constraints, false paths, multi-cycle paths, IO delays, exceptions, and waivers while reviewing flow errors, design errors, and violations. As an ASIC/SOC Front End Design Engineer, you will debug CDC and RDC issues, provide RTL fixes, and support the DFX team for DFX controller integration, Scan insertion, MBIST insertion, and DFT DRC & MBIST checks. The role also involves managing multiple PNR blocks, building wrappers, porting flows or designs to different technology libraries, generating RAMs based on targeted memory compilers, and integrating them with the RTL. Functional verification simulations will be run as necessary. The ideal candidate for this position should hold a B.E/M.E/M.Tech or B.S/M.S in EE/CE with 3 to 5 years of relevant experience in ASIC design flow, particularly in sub-20nm technology nodes. Proficiency in modern SOC tools like Spyglass, Synopsys design compiler & primetime, Questa CDC, Cadence Conformal, and VCS simulation is required. Experience in signoff of front end quality checks & metrics for various project milestones is essential. Additionally, familiarity with TCL, Perl, and Python scripting is preferred. This position is based in Hyderabad with an immediate start date. The desired candidate should have 3 to 5 years of experience in the field.,

As a Silicon Design Engineer 2 at AMD, your role is crucial in executing the front end implementation of sub-blocks or IP. You will be responsible for tasks such as synthesis, LEC, CLP, prelayout STA, and postlayout STA/Timing closure. Collaborating with the design team and PNR teams is essential to achieve closure and execute tasks as per schedule. Your key responsibilities include ensuring quality delivery for synthesis and timing closure, as well as debugging and resolving technical issues efficiently. The ideal candidate for this role should have experience in synthesis and timing closure, with additional experience in LEC and CLP being a plus. Handling blocks with complex designs, high-frequency clocks, and complex clocking should be within your expertise. A complete understanding of timing constraints, low power aspects, and concepts of DFT is necessary, along with the ability to debug and resolve issues effectively. Proficiency in scripting and automation will be beneficial in this role. To qualify for this position, you should hold a Bachelor's degree with 2 years of experience or a Master's degree with 1 year of experience in Electrical Engineering. Your academic credentials will play a significant role in showcasing your eligibility for this role at AMD. Join us at AMD, where together we advance technology and strive for innovation to solve the world's most important challenges. Your contributions as a Silicon Design Engineer 2 will be instrumental in building great products that shape next-generation computing experiences across various domains such as the data center, artificial intelligence, PCs, gaming, and embedded systems. Let's push the limits of innovation and make a difference in our industry, communities, and the world.,

Primary Responsibilities: Be able to lead the deliveries end to end Prepare detail design documents based on HLD. Consult with System Analyst, Subject Master Expert, users to evaluate business requirements, evaluate existing or proposed systems, and prepare detailed technical design document from which programs will be written Walk-thru the technical design document with SA/SME/QA group and support team Review the details design & develop or modify the existing batch or online modules programs Ensuring timely deliveries for all assigned tasks Participation in Design reviews, Test Case reviews, and Production Support readiness reviews for new releases Support QA, UAT and Release phases of the project via defect analysis, change maintenance, etc. Adhere to all quality requirements Be able to work independently Comply with the terms and conditions of the employment contract, company policies and procedures, and any and all directives (such as, but not limited to, transfer and/or re-assignment to different work locations, change in teams and/or work shifts, policies in regards to flexibility of work benefits and/or work environment, alternative work arrangements, and other decisions that may arise due to the changing business environment). The Company may adopt, vary or rescind these policies and directives in its absolute discretion and without any limitation (implied or otherwise) on its ability to do so #Nic #NJP Required Qualifications: Undergraduate degree or equivalent experience 5+ years of IT experience in AS400 technologies Hands-on experience in DB2/400 Experience in RxClaim core adjudication area Solid knowledge and hands-on experience in SYNON Solid knowledge of SQL Proven ability to ensure timely deliveries for all assigned tasks Proven ability to participate in Design reviews, Test Case reviews, and Production Support readiness reviews for new releases Proven ability to support QA, UAT and Release phases of the project via defect analysis, change maintenance, etc. Proven ability to adhere to all quality requirements Proven ability to work independently Proven good communication and presentation skills Proven good attitude and self-motivated Adaptable to work in evening shift (11:30 am 8.30 pm or 2:30 pm 12:00 am) Proficiency with AI-powered development tools such as GitHub Copilot or AWS Code Whisperer or Googles Codey (Duet AI) or any relevant tools is expected. Candidates should be adept at integrating these tools into their workflows to accelerate development, improve code quality, and enhance delivery velocity. Expected to proactively leverage AI tools throughout the software development lifecycle to drive faster iteration, reduce manual effort, and boost overall engineering productivityAt UnitedHealth Group, our mission is to help people live healthier lives and make the health system work better for everyone. We believe everyone-of every race, gender, sexuality, age, location and income-deserves the opportunity to live their healthiest life. Today, however, there are still far too many barriers to good health which are disproportionately experienced by people of color, historically marginalized groups and those with lower incomes. We are committed to mitigating our impact on the environment and enabling and delivering equitable care that addresses health disparities and improves health outcomes an enterprise priority reflected in our mission.

Strong on Digital Design, SV, UVM. Hands-on experience in any of the DV protocols like PCIe, USB 3.0, DDR 3/4/5, AMBA, Ethernet (10G/100G), SATA, and MIPI (CSI/DSI), UFS, CXL Also Hiring PD, RTL, DFT Apply& Share resume to mansoor@hisoltech.com

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Synthesis, LEC, Low power checks, Memory BIST insertion, Constraints validation. Development of signoff quality constraints and the development of power intent constraints. May also include running RTL Lint, CLP, MEMBIST, DFT DRC etc. TCL script development in addition to running/analyzing/debugging designs. Hands on with Synopsys DCG/Genus/Fusion Compiler. Hands on with Synopsys Prime Time including constraint development for complex blocks with multiple clock domains. Hands on with Cadence Conformal LEC and Cadence Conformal Low Power including UPF development Experience with either RTL development or Physical Design is also a plus 6+ years experience Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Primary Responsibilities: Be able to lead the deliveries end to end Prepare detail design documents based on HLD. Consult with System Analyst, Subject Master Expert, users to evaluate business requirements, evaluate existing or proposed systems, and prepare detailed technical design document from which programs will be written Walk-thru the technical design document with SA/SME/QA group and support team Review the details design & develop or modify the existing batch or online modules programs Ensuring timely deliveries for all assigned tasks Participation in Design reviews, Test Case reviews, and Production Support readiness reviews for new releases Support QA, UAT and Release phases of the project via defect analysis, change maintenance, etc. Adhere to all quality requirements Be able to work independently Comply with the terms and conditions of the employment contract, company policies and procedures, and any and all directives (such as, but not limited to, transfer and/or re-assignment to different work locations, change in teams and/or work shifts, policies in regards to flexibility of work benefits and/or work environment, alternative work arrangements, and other decisions that may arise due to the changing business environment). The Company may adopt, vary or rescind these policies and directives in its absolute discretion and without any limitation (implied or otherwise) on its ability to do so Required Qualifications: Undergraduate degree or equivalent experience 5+ years of IT experience in AS400 technologies Hands-on experience in DB2/400 Experience in RxClaim core adjudication area Solid knowledge and hands-on experience in SYNON Solid knowledge of SQL Proven ability to ensure timely deliveries for all assigned tasks Proven ability to participate in Design reviews, Test Case reviews, and Production Support readiness reviews for new releases Proven ability to support QA, UAT and Release phases of the project via defect analysis, change maintenance, etc. Proven ability to adhere to all quality requirements Proven ability to work independently Proven good communication and presentation skills Proven good attitude and self-motivated Adaptable to work in evening shift (11:30 am 8.30 pm or 2:30 pm 12:00 am) Proficiency with AI-powered development tools such as GitHub Copilot or AWS Code Whisperer or Googles Codey (Duet AI) or any relevant tools is expected. Candidates should be adept at integrating these tools into their workflows to accelerate development, improve code quality, and enhance delivery velocity. Expected to proactively leverage AI tools throughout the software development lifecycle to drive faster iteration, reduce manual effort, and boost overall engineering productivityAt UnitedHealth Group, our mission is to help people live healthier lives and make the health system work better for everyone. We believe everyone-of every race, gender, sexuality, age, location and income-deserves the opportunity to live their healthiest life. Today, however, there are still far too many barriers to good health which are disproportionately experienced by people of color, historically marginalized groups and those with lower incomes. We are committed to mitigating our impact on the environment and enabling and delivering equitable care that addresses health disparities and improves health outcomes an enterprise priority reflected in our mission.

You should have 2-3 years of experience in STA & Synthesis engineering. The position is based in Hyderabad. It is essential that you possess expertise in AMD TB flow for at least 2 years. Proficiency in scripting languages like tcl, python, and perl is required. You should have a good understanding of synthesis, static timing analysis (STA), logic equivalence checking (LEC), and constraint logic programming (CLP). As part of the role, you should be able to independently debug issues and effectively communicate the root cause along with the solution. If you meet these requirements and are interested in this opportunity, please send your updated resume to janagaradha.n@acldigital.com.,

As a VLSI Design Engineer at Kinara, you will be part of a dynamic team focused on edge AI technology, pushing the boundaries of what's achievable in machine learning and artificial intelligence. You will contribute to the development of state-of-the-art AI processors and high-speed interconnects, ensuring unmatched performance, power efficiency, and scalability to meet the demands of modern AI applications. Your role will involve working on cutting-edge semiconductor projects, requiring a blend of technical expertise, problem-solving skills, and collaborative teamwork. Your responsibilities will include defining micro-architecture and creating detailed design specifications, developing RTL code based on system-level requirements using Verilog, VHDL, or SystemVerilog, implementing complex digital functions and algorithms in RTL, and executing comprehensive test plans to verify RTL designs. You will optimize designs for power, performance, and area constraints, conduct simulation and debugging activities to ensure design accuracy, collaborate with verification engineers to develop test benches and validate RTL against specifications, and apply your strong understanding of digital design principles and concepts. To excel in this role, you should possess proficiency in writing and debugging RTL code, experience with synthesis, static timing analysis, and linting tools, familiarity with scripting languages like Python, Perl, or TCL for automation, and expertise in processor subsystem design, interconnect design, or high-speed IO interface design. A Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, along with 5+ years of experience in RTL design and verification, is required. Proven experience in digital logic design using Verilog, VHDL, or SystemVerilog, familiarity with simulation tools such as VCS, QuestaSim, or similar, and hands-on experience with RTL design tools like Synopsys Design Compiler and Cadence Genus is preferred. At Kinara, we offer an innovative environment where technology experts and mentors collaborate to tackle exciting challenges. We believe in sharing responsibilities and valuing diverse viewpoints. If you are passionate about making a difference in the field of edge AI technology, we invite you to join our team and contribute to creating a smarter, safer, and more enjoyable world. Your application is eagerly awaited as we look forward to reviewing your qualifications and experiences. Make your mark with us at Kinara!,

Project Role : Full Stack Engineer Project Role Description : Responsible for developing and/or engineering the end-to-end features of a system, from user experience to backend code. Use development skills to deliver innovative solutions that help our clients improve the services they provide. Leverage new technologies that can be applied to solve challenging business problems with a cloud first and agile mindset. Must have skills : Python (Programming Language), RPGLE, CLP Good to have skills : NAMinimum 7.5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Full Stack Engineer, you will be responsible for developing and engineering the end-to-end features of a system, from user experience to backend code. Your typical day will involve collaborating with cross-functional teams to design and implement innovative solutions that enhance client services. You will leverage new technologies and methodologies to address complex business challenges, all while maintaining a cloud-first and agile mindset. Engaging in problem-solving and continuous improvement will be key aspects of your role, ensuring that the systems you develop are efficient, scalable, and user-friendly. Roles & Responsibilities:- Expected to be an SME.- Collaborate and manage the team to perform.- Responsible for team decisions.- Engage with multiple teams and contribute on key decisions.- Provide solutions to problems for their immediate team and across multiple teams.- Mentor junior team members to enhance their skills and knowledge.- Continuously evaluate and improve development processes to increase efficiency. Professional & Technical Skills: - Must To Have Skills: Proficiency in Python (Programming Language).- Strong understanding of web development frameworks such as Django or Flask.- Experience with front-end technologies including HTML, CSS, and JavaScript.- Familiarity with database management systems like PostgreSQL or MySQL.- Knowledge of cloud services and deployment strategies. Additional Information:- The candidate should have minimum 7.5 years of experience in Python (Programming Language).- This position is based at our Pune office.- A 15 years full time education is required. Qualification 15 years full time education

1.DV 2.PD 3.DFT 4.RTL 5.PD(VLCP)/(EMIR) 6.PV 7.STA/Synthesis

Qualcomm India Private Limited is seeking a Hardware Engineer to be a part of the Engineering Group, specifically in the Hardware Engineering team. As a Qualcomm Hardware Engineer, you will be involved in various aspects of planning, designing, optimizing, verifying, and testing electronic systems. This role will require you to work on circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to contribute to the development of cutting-edge, world-class products. Collaboration with cross-functional teams is essential to develop solutions that meet performance requirements. To be considered for this position, you must have a minimum of a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field, along with at least 3 years of Hardware Engineering or related work experience. Alternatively, a Master's degree with 2+ years of experience or a PhD with 1+ year of experience in the same fields will also be considered. Proficiency in Synthesis, LEC, Low power checks, Memory BIST insertion, Constraints validation, and the development of signoff quality constraints and power intent constraints is required. Experience with TCL script development, RTL development, or Physical Design will be advantageous. The ideal candidate should have at least 6 years of experience in Hardware Engineering. Qualcomm is an equal opportunity employer and is committed to providing reasonable accommodations for individuals with disabilities during the application/hiring process. If you require an accommodation, please contact disability-accommodations@qualcomm.com. Qualcomm expects its employees to adhere to all applicable policies and procedures, including those related to the protection of company confidential information. Please note that Qualcomm's Careers Site is intended for individuals seeking job opportunities directly with Qualcomm. Staffing and recruiting agencies are not authorized to submit profiles, applications, or resumes through the Careers Site. Unsolicited submissions from agencies will not be accepted. For more information about this role, please reach out to Qualcomm Careers directly.,

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Experience 2 to 20 years Qualcomm's Bangalore WLAN PHY (Baseband) team is seeking VLSI Digital Design Engineers to lead IP development for the latest WiFi standards. Our WLAN PHY team, comprised of highly passionate and seasoned domain experts, prides itself on years of experience in taking WLAN PHY designs from concept to silicon independently. WLAN PHY team is responsible for delivering the end-to-end Tx/Rx DSP chains- all the way from antenna samples post ADC to raw bits for upper layers and on the reverse path from raw bits to DAC. The team specializes in working with challenges of practical high-speed wireless communication systems and finding innovative solutions to counter them. The team works extensively on typical signal processing functions like filters, matrix transformations (e.g.QR, Cholesky decomposition), channel estimation, equalization (MMSE, MRC, ML), decoders/encoders (e.g.LDPC, Viterbi) , demodulators, FFT etc. on a day-to-day basis, and contributes to the development/ enhancement/ evaluation of signal processing algorithms to cater to new requirements. We are looking for someone as passionate as us and takes pride in their work. WiFi's ubiquity in modern times is undeniable, and the IEEE 802.11 Working Group is continually developing new standards to satisfy the growing demand for high throughput and low-latency real-time applications, such as VR and AR. Qualcomm is at the forefront of the WiFi revolution, aiming to become the global leader in WiFi chip solutions. The WLAN PHY team in Bangalore is instrumental in realizing this vision. Requirements: Looking for a candidate with 1 to 3 years of hands-on experience in micro-architecting and developing complex IPs. Expertise in digital design, VLSI concepts, and experience in creating power/area-efficient IPs across multiple clock domains are essential. Proficiency in RTL coding and familiarity with RTL QA flows such as PLDRC, CDC, and CLP (optional) is expected. Candidates should be capable of proposing design alternatives to meet area/power/performance specifications and presenting these options for review. Experience in leading, guiding, or managing junior team members is advantageous. Repeated success in taking IP designs from requirements to silicon is required. While not mandatory, having developed IPs for wireless technologies (WLAN, LTE, NR, BT, UWB, etc.) or past HLS experience would be beneficial. Skills: Must have: Proficient in Verilog RTL coding, uArch, CDC check, PLDRC, Timing constraints, Python/Perl. Experience in design/debugging complex data-path/control-path IPs. Good communication, analytical & leadership skills. Good to have: System Verilog, Visio, Knowledge of signal processing concepts/algorithms and Wi-Fi standards (802.11a/b/g/n/ac/ax), experience with HLS. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.