We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: As an experienced Verification Engineer, you are passionate about ensuring the highest standards of quality in complex system designs With over a decade of experience in IP verification, you bring a deep understanding of verification methodologies and the intricacies of hardware design You are adept at designing self-checking test benches using modern verification techniques, and you excel in developing verification components such as bus functional models, monitors, and behavioral models Your expertise in implementing functional coverage and assertions using System Verilog is unmatched You are a problem-solver who thrives in debugging simulation failures and analyzing functional coverage results Your strong Verilog coding skills, combined with your prowess in C/C++ or Python scripting, make you a valuable asset to any team You are a fast learner, comfortable and confident interacting with architects, and you possess excellent written and verbal communication skills, What Youll Be Doing: Designing and implementing self-checking test benches using modern verification techniques, Developing verification components such as bus functional models, monitors, and behavioral models, Implementing functional coverage and assertions using System Verilog, Creating and executing test and functional coverage plans based on device specifications, Analyzing and debugging simulation failures to identify root causes, Evaluating functional coverage results to ensure thorough verification, The Impact You Will Have: Ensuring the highest quality of IP verification, contributing to the reliability and performance of cutting-edge technology, Enhancing the efficiency of the verification process through innovative test bench designs, Contributing to the development of high-performance silicon chips that power a wide range of applications, Supporting the continuous improvement of verification methodologies and best practices, Collaborating with cross-functional teams to achieve project milestones and deliverables, Mentoring and guiding junior engineers, fostering a culture of knowledge sharing and continuous learning, What Youll Need: Tech/M Proficiency in Verilog and System Verilog for test bench development, Experience with object-oriented verification languages like SV, UVM, Strong debugging skills and experience with industry-standard simulation tools such as Synopsys VCS, Verdi, Knowledge of FPGA architectures and experience in DDR IP verification, Who You Are: A fast learner with the ability to quickly adapt to new technologies and methodologies, An excellent communicator with strong written and verbal communication skills, A team player who collaborates effectively with cross-functional teams, An analytical thinker with strong problem-solving skills, A mentor who enjoys sharing knowledge and guiding junior engineers, The Team Youll Be A Part Of: You will be joining a dynamic team of highly skilled verification engineers who are dedicated to ensuring the highest standards of quality in IP verification The team focuses on innovative verification methodologies and collaborates closely with architects and designers to deliver high-performance silicon chips Together, you will work on cutting-edge projects that drive technological advancements in various industries, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process,

We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are a seasoned verification engineer with a passion for cutting-edge technology With a BSEE in Electrical Engineering and over 5 years of relevant experience, or an MSEE with over 4 years, you bring a wealth of knowledge in developing System Verilog based test environments, implementing test plans, and extracting verification metrics You possess strong HVL coding skills and hands-on experience with industry-standard simulators such as VCS, NC, or MTI, and waveform-based debugging tools Your familiarity with verification methodologies like VMM, OVM, or UVM is solid, and you have a deep understanding of protocols such as AMBA, SD/eMMC, MIPI-I3C/UFS/Unipro, Ethernet, DDR, PCIe, and USB Your experience with Scatter Gather DMA and exposure to serial protocols like SPI/I2C/I2S/UART are highly valued Additionally, you are proficient in scripting languages such as Perl, TCL, or Python, and have knowledge of HDLs like Verilog Your exposure to VC Formal and IP design and verification processes, including VIP development, is an added advantage You exhibit excellent written and oral communication skills, demonstrate strong analytical and problem-solving abilities, and show high levels of initiative This role is not open for college fresh grads and requires prior industry experience, What Youll Be Doing: Specify, design/architect, and implement state-of-the-art verification environments for the Synopsys family of synthesizable cores, Perform verification tasks for IP cores, ensuring they meet the highest standards of quality, Collaborate closely with RTL designers and be part of a global team of expert verification engineers, Work on next-generation AMBA protocols and serial protocols for commercial, enterprise, and automotive applications, Engage in test planning, test environment coding at both unit and system levels, test case coding and debugging, and FC coding and analysis, Manage regression and meet quality metric goals, The Impact You Will Have: Ensure the reliability and performance of Synopsys IP cores, contributing to the success of our cutting-edge products, Drive innovations in verification methodologies, enhancing the efficiency and effectiveness of our processes, Collaborate with a global team to deliver high-quality solutions that meet the needs of our customers, Support the development of next-generation technologies that will shape the future of various industries, Contribute to the continuous improvement of verification practices and standards within the organization, Play a key role in the successful delivery of IP cores for commercial, enterprise, and automotive applications, What Youll Need: BSEE in Electrical Engineering with 5+ years of relevant experience or MSEE with 4+ years of relevant experience, Experience in developing System Verilog based test environments and implementing test plans, Strong HVL coding skills and hands-on experience with industry-standard simulators and waveform-based debugging tools, Familiarity with verification methodologies such as VMM, OVM, or UVM, Knowledge of protocols such as AMBA, SD/eMMC, MIPI-I3C/UFS/Unipro, Ethernet, DDR, PCIe, and USB, Who You Are: Excellent written and oral communication skills, Strong analytical and problem-solving abilities, High levels of initiative and the ability to work independently, Collaborative mindset with the ability to work effectively in a global team environment, Detail-oriented with a focus on quality and continuous improvement, The Team Youll Be A Part Of: You will be part of the R&D in Solutions Group at our Bangalore Design Center, India This dynamic team focuses on IP verification and works on technically challenging IP cores using the latest verification methodologies and flows You will collaborate with RTL designers and verification engineers across multiple sites, contributing to the development of next-generation technologies, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process,

We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are a passionate and skilled R&D Engineer with a deep understanding of system verification You are enthusiastic about developing cutting-edge verification solutions for high-performance computing, data centers, mobile/client devices, automotive systems, and IoT segments Your experience in architecting and building SystemVerilog UVM-based verification components, coupled with your expertise in cache coherency protocols and functional verification, makes you an ideal candidate for this role You are a team player with excellent problem-solving abilities, strong analytical skills, and a keen attention to detail Your background in verification IP development and your programming prowess in languages like Perl, Python, and Shell scripting set you apart as a valuable asset to our team, What Youll Be Doing: Responsible for functional verification involving coherent and non-coherent IP designs, Collaborating with market leaders in High Performance Computing, Data Centre, Mobile/Client, Automotive, and IoT segments to define and develop products that meet complex verification requirements, Architecting and building SystemVerilog UVM-based verification components, testbenches, checkers, scoreboards, and verification IPs, Developing verification plans and driving functional coverage-driven verification closure of real designs, Debugging and resolving issues in verification environments to ensure robust and reliable verification processes, The Impact You Will Have: Enhancing the reliability and performance of high-performance computing and data center systems through rigorous verification processes, Contributing to the advancement of mobile and client devices by ensuring the integrity and functionality of their verification protocols, Driving innovation in the automotive sector by developing robust verification solutions for automotive systems, Supporting the growth of IoT applications by providing reliable and efficient verification for IoT devices, Collaborating with industry leaders to shape the future of system verification and contribute to technological advancements, Ensuring the successful implementation and integration of verification IPs, thereby enhancing the overall quality of our products, What Youll Need: E/B Hands-on experience in architecting and building SystemVerilog UVM-based verification components, testbenches, checkers, scoreboards, and verification IPs, You will be involved in creating System verification solutions for Arm AMBA5 protocols such as CHI, AXI5/ACE5 for on-chip, chi-to-chip, die-to-die, coherent and non-coherent design topologies, You will be responsible for functional verification involving coherent and non-coherent IP designs, Proficiency in writing scripts using Perl, Python, and Shell scripting, Who You Are: Excellent problem-solving, debugging, and analytical skills, Strong programming skills and familiarity with object-oriented programming concepts, Creative and innovative mindset, Excellent verbal and written communication skills, A collaborative team player with a passion for functional verification,

We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: We are seeking a highly motivated Product Engineer who is passionate about advancing technology and solving complex design challenges You are innovative, dependable, and have a strong technical background in transistor-level analysis With a minimum of 5 years of hands-on experience, you possess exceptional expertise in debugging circuit-level issues for SRAM, RF, ROM memories, and Standard Cells You have a deep understanding of static timing concepts and CMOS engineering fundamentals, coupled with proficiency in TCL or other scripting languages Your excellent communication and social skills enable you to collaborate effectively with cross-functional teams, including R&D, Field AEs, Sales, and Marketing You thrive in a dynamic environment, driving new products and features that exceed customer expectations and contribute to the success of Synopsys, What Youll Be Doing: Drive new products and new product features that exceed customer needs, Work with R&D to enable timely implementation of new products and features, and important bug fixes, Provide consultation to prospective users and/or product capability assessment and validation, Provide tool trainings to customers and Field AEs, Provide technical expertise to sales staff through sales presentations and product demonstrations, Assist the sales staff in assessing potential application of company products to meet customer needs and preparing detailed product specifications for the development and implementation of customer applications/solutions, The Impact You Will Have: Influence technology and solution roadmaps through collaboration with R&D, Ensure overall consistency of end-to-end design and analysis flow to meet customer needs, Drive new tool evaluations and help customers with the adoption and continuous usage of our tools, Enable Chip Design customers to achieve optimal Timing, Power, and Characterization goals, Enhance predictability and productivity for designers through advanced tool features, Identify and resolve design issues early-on, minimizing costly late-stage silicon problems, What Youll Need: BS degree in Electrical Engineering or related field, Minimum of 5 years of recent hands-on experience in transistor-level analysis, Expertise in debugging circuit-level issues for SRAM, RF, ROM memories, and Standard Cells, Proficiency in static timing concepts and CMOS engineering fundamentals, Knowledge of TCL and/or other scripting languages, Who You Are: Innovative and motivated, Dependable and detail-oriented, Excellent communicator and collaborator, Proactive problem solver, Adaptable and eager to learn, The Team Youll Be A Part Of: You will be part of a dynamic and collaborative team focused on developing state-of-the-art Static Timing, Characterization, and Library Modelling tools This team works closely with various departments, including R&D, Field AEs, Sales, and Marketing, to ensure the delivery of high-quality solutions that meet customer needs and drive technological innovation, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process,

We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are a passionate and skilled R&D Engineer with a deep understanding of system verification You are enthusiastic about developing cutting-edge verification solutions for high-performance computing, data centers, mobile/client devices, automotive systems, and IoT segments Your experience in architecting and building SystemVerilog UVM-based verification components, coupled with your expertise in cache coherency protocols and functional verification, makes you an ideal candidate for this role You are a team player with excellent problem-solving abilities, strong analytical skills, and a keen attention to detail Your background in verification IP development and your programming prowess in languages like Perl, Python, and Shell scripting set you apart as a valuable asset to our team, What Youll Be Doing: Responsible for functional verification involving coherent and non-coherent IP designs, Collaborating with market leaders in High Performance Computing, Data Centre, Mobile/Client, Automotive, and IoT segments to define and develop products that meet complex verification requirements, Architecting and building SystemVerilog UVM-based verification components, testbenches, checkers, scoreboards, and verification IPs, Developing verification plans and driving functional coverage-driven verification closure of real designs, Debugging and resolving issues in verification environments to ensure robust and reliable verification processes, The Impact You Will Have: Enhancing the reliability and performance of high-performance computing and data center systems through rigorous verification processes, Contributing to the advancement of mobile and client devices by ensuring the integrity and functionality of their verification protocols, Driving innovation in the automotive sector by developing robust verification solutions for automotive systems, Supporting the growth of IoT applications by providing reliable and efficient verification for IoT devices, Collaborating with industry leaders to shape the future of system verification and contribute to technological advancements, Ensuring the successful implementation and integration of verification IPs, thereby enhancing the overall quality of our products, What Youll Need: E/B Hands-on experience in architecting and building SystemVerilog UVM-based verification components, testbenches, checkers, scoreboards, and verification IPs, You will be responsible for functional verification involving coherent and non-coherent IP designs, Proficiency in writing scripts using Perl, Python, and Shell scripting, Who You Are: Excellent problem-solving, debugging, and analytical skills, Strong programming skills and familiarity with object-oriented programming concepts, Creative and innovative mindset, Excellent verbal and written communication skills, A collaborative team player with a passion for functional verification,

We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are a passionate and driven R&D Engineer with a deep understanding of data structures, algorithms, and their applications You have a strong background in software development, particularly with C/C++ on UNIX/Linux platforms, and are eager to tackle complex, large-scale software code-based tool development With a minimum of 8 years of related experience, you have honed your analytical, debugging, and problem-solving skills You thrive in both self-directed and collaborative environments and are committed to continuous learning and exploration of new technologies Your excellent communication skills in English enable you to effectively collaborate with team members and present your ideas clearly, What Youll Be Doing: Supporting the existing functionality of our tools and continually enhancing their versatility, performance, and memory utilization while improving software quality, Applying extensive knowledge of algorithms and data structure design to develop robust and efficient implementations that improve tool performance and customer adoption, Interacting with other Synopsys R&D members and customers to understand their needs and product goals, Contributing to the development of complex software code-based tools in a multi-person product development environment with high dependencies and tight schedules, Exercising judgment in developing methods, techniques, and evaluation criteria to meet project goals, Collaborating with a team of enthusiastic and creative engineers to drive innovation and excellence, The Impact You Will Have: Enhancing the performance and quality of our verification tools, leading to increased customer satisfaction and adoption, Driving continuous improvement in software development processes and practices, Contributing to the development of cutting-edge technologies that power innovations in various industries, Helping Synopsys maintain its leadership position in the market by delivering high-performance solutions, Influencing the direction and success of our hardware verification tools through your expertise and innovation, Fostering a collaborative and innovative work environment that encourages growth and learning, What Youll Need: A Bachelors degree in Electrical / Electronics / Computer-Science Engineering with a minimum of 8 years of related experience, or a Masters degree with 6 years of relevant experience, In-depth understanding of data structures, algorithms, and their applications, Excellent software development experience with C/C++ on UNIX/Linux platforms, Exposure to Python, TCL, and shell scripting languages is preferable, Exposure to HDL languages like Verilog or System Verilog is desirable, with a willingness to learn their nuances, Demonstrated history of good analytical, debugging, and problem-solving skills, Experience with complex and large software code-based tool development, Who You Are: You are a motivated and enthusiastic engineer who excels in both independent and collaborative settings You have a solid desire to learn and explore new technologies, and you exercise good judgment in developing methods and techniques to meet project goals Your excellent written and oral communication skills in English enable you to collaborate effectively and present your ideas clearly Special consideration will be given to candidates with a background in hardware functional verification and/or synthesis techniques, as well as knowledge of software specification, design processes, and regression testing, The Team Youll Be A Part Of: You will join the Hardware Assisted Verification team at Synopsys, a group of dedicated and innovative engineers focused on developing and enhancing our verification tools Our team is committed to pushing the boundaries of technology and delivering high-performance solutions that meet the needs of our customers We work in a collaborative and dynamic environment, where creativity and innovation are encouraged and valued, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process,

This position is in a cutting-edge synthesis product, in the area of Logic synthesis and Optimization. The candidate will be required to work on enhancing the optimization flow for performance, power, area (PPA) or runtime. This will involve identifying the opportunity for improving PPA, proposing a good solution/algorithm, implementing it, thoroughly testing it, and supporting it post-deployment. Job Requirements 1. 3+ years of work experience in EDA, preferably in logic optimization and logic synthesis. 2. Strong software skills: minimum 5 years of coding experience in C++. 3. Proficiency in data structures and algorithms. 4. Strong analytical and problem-solving skills. 5. Good understanding of chip design flow. 6. Must be a team player, clear in written and oral communication skills and open to work with diverse teams across multiple time zones. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are a seasoned professional with a passion for technology and innovation With more than 8 years of relevant experience and a strong background in layout design, you have honed your skills in managing and leading teams to success You possess a deep understanding of deep submicron effects and floorplan techniques in advanced CMOS, FinFET, and GAA process technologies at 7nm and below Your expertise in layout matching techniques, ESD, latch-up, PERC, EMIR, DFM, LEF generation, bond-pad layout, IO frame, and pitch requirements sets you apart You are adept at scripting for layout automation and have excellent communication skills that enable you to lead and mentor your team effectively Your leadership qualities shine through in your ability to guide developments of new technologies and solve complex problems You thrive in cross-functional settings and are committed to delivering high-quality layout execution with efficiency Inclusion and diversity are important to you, and you believe in fostering an environment where every team member feels valued and empowered, What Youll Be Doing: Leading the development of next-generation DDR/HBM/UCIe IPs, Providing guidance and expertise in high-speed DDR/HBM/UCIe IP layout, Acting as an advisor to team members to meet schedules and resolve issues, Performing in a project leadership role and contributing to complex project aspects, Developing and maintaining schedules, working in cross-functional settings, and ensuring proficiency in layout and verification, Mentoring junior team members and extracting the best performance from senior ones, Leading a small layout team, understanding PHY level constraints, effort estimation, and schedule planning, Supporting critical layout, floorplanning requirements, layout reviews, and quality checks, The Impact You Will Have: Driving innovation in the development of cutting-edge DDR/HBM/UCIe IPs, Ensuring high-quality layout execution that meets performance, power, and size requirements, Contributing to Synopsys leadership in the silicon IP market, Enhancing the efficiency and quality of our layout design processes, Mentoring and developing the next generation of layout design engineers, Fostering a collaborative and inclusive team environment, What Youll Need: BTech/MTech in a relevant field, 8+ years of relevant experience and team management skills, Ability to lead projects with high product quality and efficiency, In-depth understanding of deep submicron effects, floorplan techniques in advanced process technologies, Proficiency in layout matching techniques, ESD, latch-up, PERC, EMIR, DFM, LEF generation, bond-pad layout, IO frame, and pitch requirements, Scripting skills for layout automation (a plus), Excellent written and verbal communication skills, Who You Are: A visionary leader with a passion for technology and innovation, An excellent communicator with strong problem-solving skills, A mentor who fosters growth and development within the team, A collaborative team player who thrives in cross-functional settings, A detail-oriented professional committed to delivering high-quality results, The Team Youll Be A Part Of: You will be part of a dynamic and innovative team focused on developing next-generation DDR/HBM/UCIe IPs Our team is dedicated to pushing the boundaries of technology and delivering high-performance silicon IP solutions We value collaboration, creativity, and inclusivity, and we strive to create an environment where every team member feels empowered and inspired to contribute to our success, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process,

Supporting the existing functionality of our tools and continually enhancing their versatility, performance, and memory utilization while improving software quality. Applying extensive knowledge of algorithms and data structure design to develop robust and efficient implementations that improve tool performance and customer adoption. Interacting with other Synopsys R&D members and customers to understand their needs and product goals. Contributing to the development of complex software code-based tools in a multi-person product development environment with high dependencies and tight schedules. Exercising judgment in developing methods, techniques, and evaluation criteria to meet project goals. Collaborating with a team of enthusiastic and creative engineers to drive innovation and excellence. The Impact You Will Have: Enhancing the performance and quality of our verification tools, leading to increased customer satisfaction and adoption. Driving continuous improvement in software development processes and practices. Contributing to the development of cutting-edge technologies that power innovations in various industries. Helping Synopsys maintain its leadership position in the market by delivering high-performance solutions. Influencing the direction and success of our hardware verification tools through your expertise and innovation. Fostering a collaborative and innovative work environment that encourages growth and learning. What You'll Need: A Bachelor s degree in Electrical / Electronics / Computer-Science Engineering with a minimum of 8 years of related experience, or a Master s degree with 6 years of relevant experience. In-depth understanding of data structures, algorithms, and their applications. Excellent software development experience with C/C++ on UNIX/Linux platforms. Exposure to Python, TCL, and shell scripting languages is preferable. Exposure to HDL languages like Verilog or System Verilog is desirable, with a willingness to learn their nuances. Demonstrated history of good analytical, debugging, and problem-solving skills. Experience with complex and large software code-based tool development

You're an experienced and passionate Analog and Mixed-Signal (A&MS) Senior Circuit Design Expert with a strong background in PLL and SERDES design . You bring a deep understanding of mixed-signal techniques for dynamic and static power reduction, performance enhancement, and area reduction. Your expertise covers circuit architectures simulation, circuit layout, and knowledge of bipolar, CMOS, passive structures, and interconnect failure modes in advanced FinFET technology nodes. You excel at developing Analog Full Custom circuit macros , including PLLs, Clock Path Functions, clocking solutions, TX/RX datapaths, and power management and regulation for High Speed PHY IP in both planar and FinFET CMOS technology. You thrive in collaborative environments, working closely with silicon test and debug experts to enhance quality through Sim2Sil correlation . You're also passionate about building and nurturing analog design talent to boost business impact through successful project execution. What You'll Be Doing: Leading SERDES analog design and development. Analyzing various mixed-signal techniques for power reduction, performance enhancement, and area reduction. Developing Analog Full Custom circuit macros for High Speed PHY IP in advanced technology nodes. Collaborating with silicon test and debug experts for Sim2Sil correlation. Building and nurturing a team of analog design talent. Working with experienced teams both locally and globally. The Impact You Will Have: Driving innovation in mixed-signal analog design. Enhancing the performance and efficiency of high-speed physical interfaces. Contributing to the development of cutting-edge technology in High Speed PHY IP. Improving quality and reliability through collaboration and Sim2Sil correlation. Growing the business impact by building and leading a talented team. Advancing Synopsys leadership in chip design and IP integration. What You'll Need: BE with 18+ years or MTech with 15+ years of relevant experience in mixed-signal analog, clock, and datapath circuit design. Strong knowledge of RF architecture and blocks such as transceivers, VCOs, LNA, and up/down converters. Experience in designing Charge-pump-based PLLs, Fractional-N PLLs, Digital PLLs, XTAL oscillators, and LO generation circuits. Proficiency in high-speed digital circuit design and timing/phase noise analysis. Ability to create behavioral models of PLL to drive architectural decisions. Who You Are: Possessing strong fundamentals in CMOS, device physics, and sub-micron design methodologies. Experienced with PLL designs and high-speed digital circuit design. Knowledgeable in control systems, band gaps, bias, op-amps, LDOs, and feedback techniques. Experienced in LC VCO/DCO design and performance parameters of VCO. Familiar with digitally assisted analog circuit techniques. The Team You'll Be A Part Of: You'll be joining an expanding analog/mixed-signal SERDES team focused on the design and development of cutting-edge High Speed Physical Interface Development . You'll collaborate with experienced teams locally and with colleagues from various sites across the globe, fostering a truly collaborative and innovative environment.

Description We are seeking a Staff ASIC RTL Digital Design Engineer to join our dynamic team in India. The ideal candidate will have a strong background in ASIC design and will be responsible for developing high-quality RTL designs, participating in verification processes, and collaborating with multiple teams to ensure successful project completion. Responsibilities Design and implement RTL code for ASIC digital circuits. Perform RTL simulations and verification using tools like ModelSim or VCS. Collaborate with verification engineers to ensure design functionality and performance. Participate in design reviews and provide constructive feedback. Work closely with physical design teams to ensure successful handoff and integration of digital designs. Troubleshoot and resolve design issues during the development and testing phases. Skills and Qualifications Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field. 5-10 years of experience in ASIC digital design and RTL coding. Proficient in VHDL/Verilog/SystemVerilog for RTL design. Experience with digital design tools such as Cadence, Synopsys, or Mentor Graphics. Strong understanding of digital logic design principles and methodologies. Familiarity with ASIC design flow, including synthesis, place and route, and timing closure. Ability to work collaboratively in a team environment and communicate effectively with cross-functional teams.

As an ideal candidate, you are a highly motivated and experienced Analog Design Engineer with a passion for developing state-of-the-art analog sensors. You have a solid background in custom analog/mixed-signal circuit design, circuit simulations, custom layout, and post-silicon characterization. You thrive in a collaborative environment, guiding junior engineers, and liaising with layout teams to achieve optimal engineering solutions. Your forward-thinking approach, combined with your extensive technical knowledge, enables you to tackle the unique challenges posed by various target applications. You possess a BTech or MTech degree in Electrical Engineering with 1+ years of relevant industry experience or a PhD with relevant experience. Your expertise in advanced process challenges, including ESD and reliability, and your familiarity with tools like PrimeSim, FineSim, and HSPICE, set you apart as a leader in the field. What You'll Be Doing: Conceptualizing, designing, and productizing state-of-the-art on-chip Process, Voltage, Temperature, Current, and Droop sensors. Developing innovative solutions in the field of on-die monitoring. Liaising with the layout team to achieve the best possible engineering solutions. Deploying new sensors into test chips and conducting post-silicon characterization. Guiding and mentoring junior engineers and tracking their work progress. Collaborating with internal teams and external customers to ensure project success. The Impact You Will Have: Enhancing the performance, power, area, schedule, and yield of our products. Contributing to the reliability and optimization of next-generation intelligent in-chip sensors. Driving innovation in on-die monitoring solutions. Improving the integration process for customers, leading to faster time-to-market. Providing technical leadership and mentoring to junior engineers. Ensuring the successful deployment and characterization of new sensors. What You'll Need: Strong technical experience in full custom analog/mixed-signal circuit design, simulations, and custom layout. Technical knowledge of custom Analog/AMS design techniques, implementation, and verification. Familiarity with advanced process challenges, including ESD and reliability. Experience with tools like PrimeSim, FineSim, HSPICE, and Custom Compiler or equivalent schematic layout editor tools.

What You Need: 1-3 years of experience with revenue recognition audit/ review exposure, either in a public accounting firm or a high-growth software company. University degree with a focus in business or economics; advanced degree or accounting certification (CA, CPA, CMA or equivalent) preferred. Excellent communication skills. Exceptional attention to detail, time-management, and customer service skills. Proficiency in Excel functions, including but not limited to VLOOKUP, SUMIF, Pivot tables, and IF statements. Exceptional work ethic.

We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are an experienced and motivated SOC Engineer with a passion for cutting-edge technology and innovation With a strong background in system-on-chip (SOC) design and verification, you bring a wealth of knowledge and a keen eye for detail You thrive in a collaborative environment, working seamlessly with cross-functional teams to deliver high-quality solutions Your problem-solving skills are exceptional, and you have a proven track record of successfully managing complex projects You are proactive, adaptable, and always eager to learn and grow in a dynamic and fast-paced setting, What Youll Be Doing: Designing and implementing SOC solutions for various applications, ensuring high performance and reliability, Collaborating with cross-functional teams to define and develop SOC architecture and specifications, Conducting verification and validation of SOC designs to ensure compliance with industry standards and customer requirements, Optimizing SOC designs for power, performance, and area (PPA) to meet project objectives, Debugging and resolving issues in SOC designs, utilizing advanced tools and methodologies, Providing technical guidance and mentorship to junior engineers, fostering a culture of continuous improvement and innovation, Job Description And Requirements The role is for RTL Design and Signoff of IP/Subsystem/SoC Design in the System Solutions Group (SSG) At SSG, we are a team of experts in various Synopsys technologies to deliver architecture, design, verification, implementation, tools, methodology to enable our customers complete their most challenging SoC Design projects Our work spans from sub-blocks to full turnkey end-to-end SoCs Our customers range from start-ups to industry leaders, commercial companies, and government agencies, As part of this role, you can expect to develop and deliver your expertise in RTL Signoff and RTL Design Techniques while working on activities such as Lint/CDC/RDC Checks, Timing Constraints Development, Preliminary Synthesis, Formality and RTL Design The role will expose you to various innovative technologies deployed for RTL Quality Signoff for Semiconductors, Responsibilities Perform RTL Quality Signoff Checks such as LINT, CDC, RDC, Understand the design/architecture and develop timing constraints for synthesis and timing, Run preliminary synthesis to ensure that the design can be synthesized as intended, Run formality to ensure equivalence of RTL and gates, Integrate IPs in SoCs/Subsystems and create RTL design as per need of the customer, Required E/B Hands-on experience on static verification tools such as Spyglass performing LINT, CDC, RDC, Good conceptual understanding of design/architecture pitfalls across clock/reset domain crossing, Good conceptual understanding of RTL rule checks, Hands-on experience on synthesis and timing constraints development, Candidates with experience on ARM based technologies (Coresight Debug, Processor architecture, etc ) will be preferred, The Team Youll Be A Part Of: You will join a highly skilled and motivated team dedicated to developing advanced SOC solutions Our team focuses on innovation, collaboration, and excellence, working together to deliver high-quality designs that drive technological advancements We value diversity and inclusion, fostering a supportive and dynamic environment where every team member can thrive and contribute to our success, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring proces

Working on Functional Verification of High-Speed PHY IPs for DDRxx, LPDDRxx, PCIex, Display, and HDMI protocol standards. Studying IP/design blocks/Firmware Specifications and building/updating verification plans and test cases. Building/updating functional verification environments to execute test plans. Developing DV/Firmware test benches, test plans, and test cases. Implementing checkers, assertions, random test generators, high-level transactional models, and bus functional models (BFMs). Performing simulation, random and focused stimulus generation, and coverage analysis. Collaborating closely with digital designers for debugging and achieving desired coverage. Developing architecture and micro-architecture knowledge of complex digital design blocks under test. The Impact You Will Have: Ensuring the high quality and reliability of our High-Speed PHY IPs. Contributing to the successful delivery of cutting-edge technology solutions. Enhancing the performance and functionality of our products through rigorous verification. Driving innovation and excellence in our verification processes. Supporting the rapid integration of capabilities into SoC designs. Enabling our customers to bring differentiated products to market quickly with reduced risk. What You'll Need: B. Tech/M. Tech in EC/CS with 3-6 years of relevant experience in pre-silicon verification of complex PHY IPs, ASIC, or SoC designs. Understanding of functional verification flow with experience on industry-standard development and verification tools and methodologies such as VMM, OVM/UVM, and System Verilog. Proficiency in System Verilog Assertions, code and functional coverage implementation, and review. Excellent debug and diagnostic skills. Experience with scripting and automation using TCL, PERL, or Python.

What You ll Be Doing: Develop and implement layout designs for A&MS integrated circuits. Optimize layouts using industry-standard EDA tools. Perform physical verification and design rule checks. Participate in Layout reviews and provide feedback. Collaborate with circuit designers on specifications and constraints. Enhance layout design methodologies and best practices. Stay updated with industry trends in A&MS layout design. The Impact You Will Have: Ensure high quality and performance of A&MS integrated circuits. Drive innovation with cutting-edge layout designs. Improve manufacturability and reliability through meticulous design. Contribute valuable feedback during design reviews. Foster continuous improvement in design methodologies. Mentor junior engineers by sharing your expertise.

What You ll Need: Minimum 5 years of experience in VLSI product engineering. Exposure to analog and digital SOC design flows and methodologies. Experience in RTL Development, RTL Verification, and RTL to GDS flow. Proven track record of working on different technology nodes. Ability to manage multiple projects and set priorities effectively.

What You ll Need: Minimum 5 years of experience in VLSI product engineering. Exposure to analog and digital SOC design flows and methodologies. Experience in RTL Development, RTL Verification, and RTL to GDS flow. Proven track record of working on different technology nodes. Ability to manage multiple projects and set priorities effectively.

If you share our passion for innovation, we want to meet you, Our Silicon Design & Verification business is all about building high-performance silicon chipsfaster Were the worlds leading provider of solutions for designing and verifying advanced silicon chips And we design the next-generation processes and models needed to manufacture those chips We enable our customers to optimize chips for power, cost, and performanceeliminating months off their project schedules, You Are: You are a highly skilled and passionate engineer with a talent for tackling complex problems and a strong desire to advance cutting-edge technology With over five years of experience in Physical Implementation RTL-GDS, you bring deep expertise in autonomously diagnosing and resolving synthesis and place-and-route (PnR) challenges You are proficient in scripting languages like Tcl, Unix, and Perl, and possess an in-depth knowledge of Synopsys implementation tools Your strong communication abilities enable you to engage effectively with both customers and internal teams, ensuring precise and attentive fulfillment of their needs Driven, self-starting, and highly collaborative, you excel in environments where you can advocate for customers and represent the product Additionally, your ability to translate technical insights into actionable requirements for R&D teams plays a crucial role in driving innovation and strengthening Synopsys solution capabilities, What Youll Be Doing: Providing technical support and expertise to global customers using Synopsys Implementation products, Engaging in specific flagship projects and providing enabling solutions in all parts of the design implementation flow, Participating in technical campaigns to drive Synopsys solution adoption through hands-on involvement, Acting as a customer advocate while interfacing with the product development team to influence product roadmap and future technologies, Contributing to technical articles in the Knowledge Base to provide self-help guidance for common customer issues, Rolling out new product methodologies by providing training and technical support to customers, The Impact You Will Have: Delivering comprehensive support and effective technical solutions to enhance customer satisfaction, Driving innovation by addressing design challenges and improving product performance based on customer feedback, Collaborating with R&D teams to advance future technologies and product features, Promoting Synopsys tools to grow market presence and adoption, Ensuring seamless EDA transitions to optimize customer outcomes, Strengthening Synopsys reputation as a leader in silicon design and verification, What Youll Need: Bachelor's or Master's degree in Electrical Engineering, Computer Science, or a related field, Expertise in Implementation Methodologies and Synopsys Tool Fusion Compiler, Knowledge of STA, Low Power Flows, Design Planning, and scripting languages like TCL/Python, Thorough understanding of RTL to GDS flows and methodologies, Excellent verbal and written communication skills, Experience in customer-facing roles is a plus, Deep domain knowledge in Synthesis, Place & Route, and timing analysis, with multiple chip tape-outs at 7nm or lower nodes, Who You Are: An effective communicator with strong interpersonal skills, A proactive self-starter who takes initiative and drives projects to completion, A collaborative team player who values teamwork and collective success, Detail-oriented and committed to delivering high-quality solutions, Adaptable and eager to learn new technologies and methodologies, The Team Youll Be A Part Of: You will be part of a dedicated team of application engineers focused on providing top-notch technical support and solutions to our customers The team's core purpose is to ensure customer success and satisfaction by leveraging Synopsys cutting-edge technologies and products You will collaborate closely with other engineers, sales teams, and product development teams to achieve our collective goals and drive innovation in the industry, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process,

* Diagnose problem, understand customer requirements and propose new enhancements for product improvement. * Support Benchmarking/customer engagements * Perform internal testing along release cycles * Prepare usage specification for new projects * Prepare and Deliver Product training/presentation/demos Qualifications and Experience * 5+ year Transistor level circuit simulation or support experience. * Experience in Standard Cell design, IO Cell design or Custom Cell design. * Experience in Std Cell/IO Cell/Custom Cell characterization * Solid understanding of SPICE simulation with industry-standard simulators * Knowledge of simulation environment integration is desirable. * Excellent communication and presentation skills, problem solving, and project management skills as well as ability to interface with customers and developers are essential. * Education: BSEE or equivalent with 5+ years (or MS/Ph.D. with 3+ years) of relevant experience